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Fri, 7 Jun 2024 04:04:45 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [10.24.69.66]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45794Xgl020305; Fri, 7 Jun 2024 04:04:42 -0500 From: Beleswar Padhi To: , CC: , , , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j722s-evm: Enable Mailbox clusters Date: Fri, 7 Jun 2024 14:34:32 +0530 Message-ID: <20240607090433.488454-3-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607090433.488454-1-b-padhi@ti.com> References: <20240607090433.488454-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 The K3 J722S SoCs have one single-core Arm Cortex-R5F processor in each of the WAKEUP, MCU and MAIN voltage domain, and two C71x DSP subsystems in MAIN voltage domain. The Inter-Processor communication between the main A72 cores and these R5F and DSP remote cores is achieved through shared memory and Mailboxes. Thus, enable the Mailbox clusters required for communication. Signed-off-by: Beleswar Padhi --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 37 +++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index bf3c246d13d1f..a51925deb43b8 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -384,3 +384,40 @@ &sdhci1 { status = "okay"; bootph-all; }; + +&mailbox0_cluster0 { + status = "okay"; + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + status = "okay"; + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + status = "okay"; + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster3 { + status = "okay"; + mbox_main_r5_0: mbox-main-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; + + mbox_c7x_1: mbox-c7x-1 { + ti,mbox-rx = <2 0 0>; + ti,mbox-tx = <3 0 0>; + }; +}; -- 2.34.1