Received: by 2002:ab2:6309:0:b0:1fb:d597:ff75 with SMTP id s9csp908006lqt; Fri, 7 Jun 2024 02:15:52 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCUW1GJPkAMYeLIkEegWJJPLtgvJjE+KgvZ7LG0vLsOcFvHOaLaYV+rbOd+COjDoQlZ/xb+xffM9iLu3TCyKrKWonFlw8jKFJq+h72f29g== X-Google-Smtp-Source: AGHT+IFfVFjnUGtWiGhf1AJhhyRONwgWDbgM4Hpi1sb0feOHg4Bc3lZetGEWcA9Lo4k+XOIH1EYh X-Received: by 2002:a05:6a00:1994:b0:6f4:bc26:e18c with SMTP id d2e1a72fcca58-7040c656e23mr2048671b3a.12.1717751751779; Fri, 07 Jun 2024 02:15:51 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1717751751; cv=pass; d=google.com; s=arc-20160816; b=iOv4BenfkfCbxJwmeg6/bbCzli8g2hQF1G/D4ZbdYGIA/CPvki8GG7VoRaddwcay1r 1f4tTnIuWSBhp0txVRTLK9/jfQUGA00RFRSYdM1pxbfKT70yCjoreyUyGOezwbaDgCXf YHLTmNM6eOExcgMvWNOKNpEZWzDii7OQ1NWKKvLqbpOF+aa/RUjoO5k9mgOdNGQuM0Hp 1nyc52exIzeYE/HCC1SUtKQGPRjpqEiP868gGckieMiVJCpFMDOHRE/8PrYYYIYY5Ziu 1FSLGeNH7ekC4XZqmhoVmDdsbE+j6obR6ERsIV41On0bN0oONt7ySh0VWZ5lZ1HdxV8c 6+vQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=S9btnKTfVMmtoCS/Jx3NLWU67XSnzWxib2jE3PLyV70=; fh=JmeVsoUmW7STZ7ULjTg4n2sT945gGek6hyzjlLLUZgs=; b=RrNe/LwchNXaZtwgpwMT8Wa3s/E+tfJp3b1xl3YdChB040/EXPDi9YueB8Rd32J3Yv JT4JrdNFSZdz0TuFmUs32aHx73yPrOVHhVhFCBUOU0e+l2HOgZ2TyM62kXrRNsCn1S5H JrJIzLN1l7d+FnJLRz0BCSco6nTcDKzmzsicVuwW7ze+DLeI7FXGaW7UaF8KxlxSjBOF paXFLdi1Sd+RqNh9bl/0/fDIb4L74PY4hUmbH8fjb/XAKkHZvKQdmOGugi3d6c/bCABu gLRmU0huC03PX429mU3dv0qRV6g/RCAtRKyDJcwTcSZpW9TDmI5aF8NFgXesBRCxlIXu BIMQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H6ffCh6D; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-205691-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-205691-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id 41be03b00d2f7-6e32a4b591fsi744465a12.757.2024.06.07.02.15.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jun 2024 02:15:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-205691-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H6ffCh6D; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-205691-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-205691-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 6231E2889F7 for ; Fri, 7 Jun 2024 09:13:25 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D868A15CD59; Fri, 7 Jun 2024 09:12:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="H6ffCh6D" Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFDEA15B993 for ; Fri, 7 Jun 2024 09:12:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717751567; cv=none; b=hjkxnltcWzqaOqB4hzOJ39sEXBvLayOpyXrUR/KrtsfH4drhV5yZD4+RFYHOBEEualEmnHb9KxJhR319maZl4h9PDFxla7FrKeRUKWcxv1BMRAru/JqGVbp0VmYdGHROur5iqk6Qo1B0j7NHU0aKkI20G3KtcgN2rXBrLpCeuf8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717751567; c=relaxed/simple; bh=LXCum04nUhrgyANF+gOb3ucpEsRPodn6dAeooMzOn1w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=Z6NynlWl00nOzJcb75WcVCPtXlRLxQX+BtWScjMKEDX3qiJ6v/tCTWDVbZMt2gGdvRlcb5MFZr+62o2fBrLYt+ooQqFF6Hem4pewZ47abAxeNnx39Xbr6xZRvc5nOWbCAOBpBEH8Z7vmc5Me1bKhImZ1UsMnptVJBfZrYHhWEZI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=H6ffCh6D; arc=none smtp.client-ip=209.85.214.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-pl1-f180.google.com with SMTP id d9443c01a7336-1f63642ab8aso17409025ad.3 for ; Fri, 07 Jun 2024 02:12:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717751564; x=1718356364; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=S9btnKTfVMmtoCS/Jx3NLWU67XSnzWxib2jE3PLyV70=; b=H6ffCh6D0UAnTuxkMTeVcQtw8ak72iDES9e5sagr2R0k2UqMUCE21UpQgnOM2bKllW C4EIYtqTrwO31CFO61/UrNcAzRAoOTV52QhNhbuVvbRjWSlQRI/EvQDtUHsvBKnGjWDG Kzdtt/2aWF6hZiiajx0ht2QQ27K0UTMRYjdzahgz8g7OOzatfTebVr6C759V6SurepsS n5XnWU1XWqFoDMEIYhfZnzQqHESPEbpn0NUk8CezFityqI8ophVpFDPHkeYrxL7cIceM rDo7dNOqCfFDpTKVCdd99yFCpb4s2C5ufAp5VpXIc8hrnN/7eJLMMLkTe2JCzE0bRygA gASg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717751564; x=1718356364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=S9btnKTfVMmtoCS/Jx3NLWU67XSnzWxib2jE3PLyV70=; b=tIoPGy1QMThJRqSMamNRwHMU3s4pvzd25K6FGuzle5FRYe23+Kru/fzejochGDsnGe apbcqsIsas0PyqkGrY3t6cFNb9i1raNiDzz1zFbE7iCIP6vDV3a5FqtMCmQac+YJYkyR AHUaSojer2Y0HeRvZl82O3JZLKMW+ZCgsM/MYKbGBHoABBHmcgz/9xkEhXLuCfo1EBnE BLa/+gx9QTm2t6HfdtoPd/T8iS4n/npnHbu8wZJWbCBNcD+wu+FhjLDSHaSfFxHClnZ1 +f1Yz28qkgKQ16skeQ9z+AVK+CqvuSrVSAa/CGJFx0Q4vGzwKCFi+zT3gY96aLAH7mQx G9Ag== X-Forwarded-Encrypted: i=1; AJvYcCVuzhwZ+veYI/yR6PE0uwroa/5BXswPSglXUXLcwQqiMopC8h0a9XP6buUiNUGljfgS9L6Vt1NMHYjMmWXXQrFqgdhB78SjVxF3INfb X-Gm-Message-State: AOJu0YxVpZch5q8PnhDMq67SdQp18w5GwQNFrLgGOF3MGMoL+nLmdMaW wmAZ/rDozGUZCGLHNSXUkHiTQJrqb8I0r9eqCQ6SiCD1BWKYNI2DhPd4EZKvOu0= X-Received: by 2002:a17:902:ecc1:b0:1f6:7e02:6ae0 with SMTP id d9443c01a7336-1f6d03a1132mr23054295ad.44.1717751563661; Fri, 07 Jun 2024 02:12:43 -0700 (PDT) Received: from localhost ([122.172.82.13]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f6bd75f316sm29440845ad.47.2024.06.07.02.12.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jun 2024 02:12:43 -0700 (PDT) From: Viresh Kumar To: "Rafael J. Wysocki" , Miguel Ojeda , Miguel Ojeda , Alex Gaynor , Wedson Almeida Filho , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Stephen Boyd , Nishanth Menon , rust-for-linux@vger.kernel.org, Manos Pitsidianakis , Erik Schilling , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Joakim Bech , Rob Herring , linux-kernel@vger.kernel.org Subject: [RFC PATCH V2 2/8] rust: Extend OPP bindings for the OPP table Date: Fri, 7 Jun 2024 14:42:17 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This extends OPP bindings with the bindings for the `struct opp_table`. Signed-off-by: Viresh Kumar --- rust/kernel/opp.rs | 374 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 372 insertions(+), 2 deletions(-) diff --git a/rust/kernel/opp.rs b/rust/kernel/opp.rs index 9e5cf0412ed5..06f36845047f 100644 --- a/rust/kernel/opp.rs +++ b/rust/kernel/opp.rs @@ -7,9 +7,9 @@ //! C header: [`include/linux/pm_opp.h`](../../../../../../include/linux/pm_opp.h) use crate::{ - bindings, + bindings, cpumask, device::Device, - error::{code::*, to_result, Result}, + error::{code::*, from_err_ptr, to_result, Error, Result}, types::{ARef, AlwaysRefCounted, Opaque}, }; @@ -31,6 +31,376 @@ pub fn new(freq: u64, u_volt: u64, level: u32, turbo: bool) -> Self { } } +/// OPP search types. +#[derive(Copy, Clone, Debug, Eq, PartialEq)] +pub enum SearchType { + /// Search for exact value. + Exact, + /// Search for highest value less than equal to value. + Floor, + /// Search for lowest value greater than equal to value. + Ceil, +} + +/// Operating performance point (OPP) table. +/// +/// # Invariants +/// +/// The pointer stored in `Self` is non-null and valid for the lifetime of the ARef instance. In +/// particular, the ARef instance owns an increment on underlying object’s reference count. +pub struct Table { + ptr: *mut bindings::opp_table, + dev: ARef, + em: bool, + of: bool, + cpumask: Option, +} + +// SAFETY: The fields of `Table` are safe to be used from any thread. +unsafe impl Send for Table {} + +// SAFETY: The fields of `Table` are safe to be referenced from any thread. +unsafe impl Sync for Table {} + +impl Table { + /// Creates a new OPP table instance from raw pointer. + /// + /// # Safety + /// + /// Callers must ensure that `ptr` is valid and non-null. + unsafe fn from_ptr(ptr: *mut bindings::opp_table, dev: ARef) -> Self { + // SAFETY: By the safety requirements, ptr is valid and its refcount will be incremented. + unsafe { bindings::dev_pm_opp_get_opp_table_ref(ptr) }; + + Self { + ptr, + dev, + em: false, + of: false, + cpumask: None, + } + } + + /// Find OPP table from device. + pub fn from_dev(dev: ARef) -> Result { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. Refcount of the OPP table is incremented as well. + let ptr = from_err_ptr(unsafe { bindings::dev_pm_opp_get_opp_table(dev.as_raw()) })?; + + Ok(Self { + ptr, + dev: dev.clone(), + em: false, + of: false, + cpumask: None, + }) + } + + /// Add device tree based OPP table for the device. + #[cfg(CONFIG_OF)] + pub fn from_of(dev: ARef, index: i32) -> Result { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. Refcount of the OPP table is incremented as well. + to_result(unsafe { bindings::dev_pm_opp_of_add_table_indexed(dev.as_raw(), index) })?; + + // Fetch the newly created table. + let mut table = Self::from_dev(dev)?; + table.of = true; + + Ok(table) + } + + // Remove device tree based OPP table for the device. + #[cfg(CONFIG_OF)] + fn remove_of(&self) { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. We took the reference from `from_of` earlier, it is safe to drop the same + // now. + unsafe { bindings::dev_pm_opp_of_remove_table(self.dev.as_raw()) }; + } + + /// Add device tree based OPP table for CPU devices. + #[cfg(CONFIG_OF)] + pub fn from_of_cpumask(dev: ARef, cpumask: &mut cpumask::Cpumask) -> Result { + // SAFETY: The cpumask is valid and the returned ptr will be owned by the [`Table`] instance. + to_result(unsafe { bindings::dev_pm_opp_of_cpumask_add_table(cpumask.as_ptr()) })?; + + // Fetch the newly created table. + let mut table = Self::from_dev(dev)?; + // SAFETY: The `cpumask` is guaranteed by the C code to be valid. + table.cpumask = Some(unsafe { cpumask::Cpumask::new(cpumask.as_mut_ptr()) }); + + Ok(table) + } + + // Remove device tree based OPP table for CPU devices. + #[cfg(CONFIG_OF)] + fn remove_of_cpumask(&self, cpumask: &cpumask::Cpumask) { + // SAFETY: The cpumask is valid and we took the reference from `from_of_cpumask` earlier, + // it is safe to drop the same now. + unsafe { bindings::dev_pm_opp_of_cpumask_remove_table(cpumask.as_ptr()) }; + } + + /// Returns the number of OPPs in the table. + pub fn opp_count(&self) -> Result { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + let ret = unsafe { bindings::dev_pm_opp_get_opp_count(self.dev.as_raw()) }; + if ret < 0 { + Err(Error::from_errno(ret)) + } else { + Ok(ret as u32) + } + } + + /// Returns max clock latency of the OPPs in the table. + pub fn max_clock_latency(&self) -> u64 { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + unsafe { bindings::dev_pm_opp_get_max_clock_latency(self.dev.as_raw()) } + } + + /// Returns max volt latency of the OPPs in the table. + pub fn max_volt_latency(&self) -> u64 { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + unsafe { bindings::dev_pm_opp_get_max_volt_latency(self.dev.as_raw()) } + } + + /// Returns max transition latency of the OPPs in the table. + pub fn max_transition_latency(&self) -> u64 { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + unsafe { bindings::dev_pm_opp_get_max_transition_latency(self.dev.as_raw()) } + } + + /// Returns the suspend OPP. + pub fn suspend_freq(&self) -> u64 { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + unsafe { bindings::dev_pm_opp_get_suspend_opp_freq(self.dev.as_raw()) } + } + + /// Synchronizes regulators used by the OPP table. + pub fn sync_regulators(&self) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { bindings::dev_pm_opp_sync_regulators(self.dev.as_raw()) }) + } + + /// Gets sharing CPUs. + pub fn sharing_cpus(dev: ARef, cpumask: &mut cpumask::Cpumask) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { + bindings::dev_pm_opp_get_sharing_cpus(dev.as_raw(), cpumask.as_mut_ptr()) + }) + } + + /// Sets sharing CPUs. + pub fn set_sharing_cpus(&self, cpumask: &cpumask::Cpumask) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { + bindings::dev_pm_opp_set_sharing_cpus(self.dev.as_raw(), cpumask.as_ptr()) + }) + } + + /// Gets sharing CPUs from Device tree. + #[cfg(CONFIG_OF)] + pub fn of_sharing_cpus(dev: ARef, cpumask: &mut cpumask::Cpumask) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { + bindings::dev_pm_opp_of_get_sharing_cpus(dev.as_raw(), cpumask.as_mut_ptr()) + }) + } + + /// Updates the voltage value for an OPP. + pub fn adjust_voltage( + &self, + freq: u64, + u_volt: u64, + u_volt_min: u64, + u_volt_max: u64, + ) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { + bindings::dev_pm_opp_adjust_voltage( + self.dev.as_raw(), + freq, + u_volt, + u_volt_min, + u_volt_max, + ) + }) + } + + /// Sets a matching OPP based on frequency. + pub fn set_rate(&self, freq: u64) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { bindings::dev_pm_opp_set_rate(self.dev.as_raw(), freq) }) + } + + /// Sets exact OPP. + pub fn set_opp(&self, opp: ARef) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { bindings::dev_pm_opp_set_opp(self.dev.as_raw(), opp.as_mut_ptr()) }) + } + + /// Finds OPP based on frequency. + pub fn opp_from_freq( + &self, + mut freq: u64, + available: Option, + index: Option, + stype: SearchType, + ) -> Result> { + let rdev = self.dev.as_raw(); + let index = index.unwrap_or(0); + + let ptr = from_err_ptr(match stype { + SearchType::Exact => { + if let Some(available) = available { + // SAFETY: The requirements are satisfied by the existence of `Device` and + // its safety requirements. The returned ptr will be owned by the new [`OPP`] + // instance. + unsafe { + bindings::dev_pm_opp_find_freq_exact_indexed(rdev, freq, index, available) + } + } else { + return Err(EINVAL); + } + } + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Ceil => unsafe { + bindings::dev_pm_opp_find_freq_ceil_indexed(rdev, &mut freq as *mut u64, index) + }, + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Floor => unsafe { + bindings::dev_pm_opp_find_freq_floor_indexed(rdev, &mut freq as *mut u64, index) + }, + })?; + + // SAFETY: The `ptr` is guaranteed by the C code to be valid. + unsafe { OPP::from_ptr_owned(ptr) } + } + + /// Finds OPP based on level. + pub fn opp_from_level(&self, mut level: u32, stype: SearchType) -> Result> { + let rdev = self.dev.as_raw(); + + let ptr = from_err_ptr(match stype { + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Exact => unsafe { bindings::dev_pm_opp_find_level_exact(rdev, level) }, + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Ceil => unsafe { + bindings::dev_pm_opp_find_level_ceil(rdev, &mut level as *mut u32) + }, + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Floor => unsafe { + bindings::dev_pm_opp_find_level_floor(rdev, &mut level as *mut u32) + }, + })?; + + // SAFETY: The `ptr` is guaranteed by the C code to be valid. + unsafe { OPP::from_ptr_owned(ptr) } + } + + /// Finds OPP based on bandwidth. + pub fn opp_from_bw(&self, mut bw: u32, index: i32, stype: SearchType) -> Result> { + let rdev = self.dev.as_raw(); + + let ptr = from_err_ptr(match stype { + // The OPP core doesn't support this yet. + SearchType::Exact => return Err(EINVAL), + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Ceil => unsafe { + bindings::dev_pm_opp_find_bw_ceil(rdev, &mut bw as *mut u32, index) + }, + + // SAFETY: The requirements are satisfied by the existence of `Device` and its + // safety requirements. The returned ptr will be owned by the new [`OPP`] instance. + SearchType::Floor => unsafe { + bindings::dev_pm_opp_find_bw_floor(rdev, &mut bw as *mut u32, index) + }, + })?; + + // SAFETY: The `ptr` is guaranteed by the C code to be valid. + unsafe { OPP::from_ptr_owned(ptr) } + } + + /// Enable the OPP. + pub fn enable_opp(&self, freq: u64) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { bindings::dev_pm_opp_enable(self.dev.as_raw(), freq) }) + } + + /// Disable the OPP. + pub fn disable_opp(&self, freq: u64) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { bindings::dev_pm_opp_disable(self.dev.as_raw(), freq) }) + } + + /// Registers with Energy model. + #[cfg(CONFIG_OF)] + pub fn of_register_em(&mut self, cpumask: &mut cpumask::Cpumask) -> Result<()> { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. + to_result(unsafe { + bindings::dev_pm_opp_of_register_em(self.dev.as_raw(), cpumask.as_mut_ptr()) + })?; + + self.em = true; + Ok(()) + } + + // Unregisters with Energy model. + #[cfg(CONFIG_OF)] + fn of_unregister_em(&self) { + // SAFETY: The requirements are satisfied by the existence of `Device` and its safety + // requirements. We registered with the EM framework earlier, it is safe to unregister now. + unsafe { bindings::em_dev_unregister_perf_domain(self.dev.as_raw()) }; + } +} + +impl Drop for Table { + fn drop(&mut self) { + // SAFETY: By the type invariants, we know that `self` owns a reference, so it is safe + // to relinquish it now. + unsafe { bindings::dev_pm_opp_put_opp_table(self.ptr) }; + + #[cfg(CONFIG_OF)] + { + if self.em { + self.of_unregister_em(); + } + + if self.of { + self.remove_of(); + } else if let Some(cpumask) = &self.cpumask { + self.remove_of_cpumask(cpumask); + } + } + } +} + /// Operating performance point (OPP). /// /// # Invariants -- 2.31.1.272.g89b43f80a514