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From: Beleswar Padhi <b-padhi@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>
CC: <kristo@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
        <conor+dt@kernel.org>, <tony@atomide.com>,
        <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <u-kumar1@ti.com>
Subject: [PATCH] arm64: dts: ti: k3-j7xx: Change timer nodes status to reserved
Date: Fri, 7 Jun 2024 16:25:59 +0530
Message-ID: <20240607105559.771080-1-b-padhi@ti.com>
Precedence: bulk
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain

The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain
use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash.

This change is already incorporated for timer nodes in the MCU voltage
domain.

Fixes: 835d04422f9d ("arm64: dts: ti: k3-j721s2: Add general purpose timers")

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi  |  2 ++
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi  |  7 +++++++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi |  6 ++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 10 ++++++++++
 4 files changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 9386bf3ef9f68..22351a4f3da6e 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1254,6 +1254,7 @@ main_timer0: timer@2400000 {
 		assigned-clock-parents = <&k3_clks 49 2>;
 		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer1: timer@2410000 {
@@ -1266,6 +1267,7 @@ main_timer1: timer@2410000 {
 		assigned-clock-parents = <&k3_clks 50 2>, <&k3_clks 313 1>;
 		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer2: timer@2420000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 0da785be80ff4..944bdbb98e910 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1102,6 +1102,7 @@ main_timer0: timer@2400000 {
 		assigned-clock-parents = <&k3_clks 49 2>;
 		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer1: timer@2410000 {
@@ -1114,6 +1115,7 @@ main_timer1: timer@2410000 {
 		assigned-clock-parents = <&k3_clks 50 2>, <&k3_clks 327 1>;
 		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer2: timer@2420000 {
@@ -1126,6 +1128,7 @@ main_timer2: timer@2420000 {
 		assigned-clock-parents = <&k3_clks 51 2>;
 		power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer3: timer@2430000 {
@@ -1246,6 +1249,7 @@ main_timer12: timer@24c0000 {
 		assigned-clock-parents = <&k3_clks 63 2>;
 		power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer13: timer@24d0000 {
@@ -1258,6 +1262,7 @@ main_timer13: timer@24d0000 {
 		assigned-clock-parents = <&k3_clks 64 2>, <&k3_clks 333 1>;
 		power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer14: timer@24e0000 {
@@ -1270,6 +1275,7 @@ main_timer14: timer@24e0000 {
 		assigned-clock-parents = <&k3_clks 65 2>;
 		power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer15: timer@24f0000 {
@@ -1282,6 +1288,7 @@ main_timer15: timer@24f0000 {
 		assigned-clock-parents = <&k3_clks 66 2>, <&k3_clks 334 1>;
 		power-domains = <&k3_pds 66 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer16: timer@2500000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 9ed6949b40e9d..c8e49454bd9b0 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -225,6 +225,7 @@ main_timer0: timer@2400000 {
 		assigned-clock-parents = <&k3_clks 63 2>;
 		power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer1: timer@2410000 {
@@ -237,6 +238,7 @@ main_timer1: timer@2410000 {
 		assigned-clock-parents = <&k3_clks 64 2>;
 		power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer2: timer@2420000 {
@@ -249,6 +251,7 @@ main_timer2: timer@2420000 {
 		assigned-clock-parents = <&k3_clks 65 2>;
 		power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer3: timer@2430000 {
@@ -261,6 +264,7 @@ main_timer3: timer@2430000 {
 		assigned-clock-parents = <&k3_clks 66 2>;
 		power-domains = <&k3_pds 66 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer4: timer@2440000 {
@@ -273,6 +277,7 @@ main_timer4: timer@2440000 {
 		assigned-clock-parents = <&k3_clks 67 2>;
 		power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer5: timer@2450000 {
@@ -285,6 +290,7 @@ main_timer5: timer@2450000 {
 		assigned-clock-parents = <&k3_clks 68 2>;
 		power-domains = <&k3_pds 68 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer6: timer@2460000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 6a4554c6c9c13..d62859c52514e 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -170,6 +170,7 @@ main_timer0: timer@2400000 {
 		assigned-clock-parents = <&k3_clks 97 3>;
 		power-domains = <&k3_pds 97 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer1: timer@2410000 {
@@ -182,6 +183,7 @@ main_timer1: timer@2410000 {
 		assigned-clock-parents = <&k3_clks 98 3>;
 		power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer2: timer@2420000 {
@@ -194,6 +196,7 @@ main_timer2: timer@2420000 {
 		assigned-clock-parents = <&k3_clks 99 3>;
 		power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer3: timer@2430000 {
@@ -206,6 +209,7 @@ main_timer3: timer@2430000 {
 		assigned-clock-parents = <&k3_clks 100 3>;
 		power-domains = <&k3_pds 100 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer4: timer@2440000 {
@@ -218,6 +222,7 @@ main_timer4: timer@2440000 {
 		assigned-clock-parents = <&k3_clks 101 3>;
 		power-domains = <&k3_pds 101 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer5: timer@2450000 {
@@ -230,6 +235,7 @@ main_timer5: timer@2450000 {
 		assigned-clock-parents = <&k3_clks 102 3>;
 		power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer6: timer@2460000 {
@@ -242,6 +248,7 @@ main_timer6: timer@2460000 {
 		assigned-clock-parents = <&k3_clks 103 3>;
 		power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer7: timer@2470000 {
@@ -254,6 +261,7 @@ main_timer7: timer@2470000 {
 		assigned-clock-parents = <&k3_clks 104 3>;
 		power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer8: timer@2480000 {
@@ -266,6 +274,7 @@ main_timer8: timer@2480000 {
 		assigned-clock-parents = <&k3_clks 105 3>;
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer9: timer@2490000 {
@@ -278,6 +287,7 @@ main_timer9: timer@2490000 {
 		assigned-clock-parents = <&k3_clks 106 3>;
 		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 		ti,timer-pwm;
+		status = "reserved";
 	};
 
 	main_timer10: timer@24a0000 {
-- 
2.34.1