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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52bb4216536sm508426e87.129.2024.06.07.04.52.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jun 2024 04:52:32 -0700 (PDT) Date: Fri, 7 Jun 2024 14:52:30 +0300 From: Dmitry Baryshkov To: Komal Bajaj Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: qdu1000: Add secure qfprom node Message-ID: References: <20240607113445.2909-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240607113445.2909-1-quic_kbajaj@quicinc.com> On Fri, Jun 07, 2024 at 05:04:45PM +0530, Komal Bajaj wrote: > Add secure qfprom node and also add properties for multi channel > DDR. This will be required for LLCC driver to pick the correct > LLCC configuration. 'will be' or 'is' ? > > Signed-off-by: Komal Bajaj > --- > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > index 7a77f7a55498..d8df1bab63d5 100644 > --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi > +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 { > reg-names = "llcc0_base", > "llcc_broadcast_base"; > interrupts = ; > + > + nvmem-cell-names = "multi-chan-ddr"; > + nvmem-cells = <&multi_chan_ddr>; > + }; > + > + sec_qfprom: efuse@221c8000 { > + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; > + reg = <0 0x221c8000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + multi_chan_ddr: multi-chan-ddr@12b { > + reg = <0x12b 0x1>; > + bits = <0 2>; > + }; > }; > }; > > -- > 2.42.0 > -- With best wishes Dmitry