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From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>
Date: Fri, 7 Jun 2024 18:53:08 +0300 (EEST)
To: Shravan Kumar Ramani <shravankr@nvidia.com>
cc: Hans de Goede <hdegoede@redhat.com>, Vadim Pasternak <vadimp@nvidia.com>, 
    David Thompson <davthompson@nvidia.com>, 
    platform-driver-x86@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 4/4] Documentation/ABI: Add new sysfs fields to
 sysfs-platform-mellanox-pmc
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Message-ID: <c7464064-d08b-ecdc-8e07-b621a466d967@linux.intel.com>
References: <cover.1717755404.git.shravankr@nvidia.com> <ef3f942c1d933ef757a0de84c2890d6779471239.1717755404.git.shravankr@nvidia.com>
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On Fri, 7 Jun 2024, Shravan Kumar Ramani wrote:

> Document newly added "count_clock" and "use_odd_counter" sysfs entries
> for the Mellanox BlueField PMC driver.
> 
> Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
> Reviewed-by: David Thompson <davthompson@nvidia.com>
> ---
>  .../ABI/testing/sysfs-platform-mellanox-pmc   | 23 +++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/Documentation/ABI/testing/sysfs-platform-mellanox-pmc b/Documentation/ABI/testing/sysfs-platform-mellanox-pmc
> index 9f987c6410da..ee03d066c0d9 100644
> --- a/Documentation/ABI/testing/sysfs-platform-mellanox-pmc
> +++ b/Documentation/ABI/testing/sysfs-platform-mellanox-pmc
> @@ -52,3 +52,26 @@ Description:
>  		Writing 0 to the sysfs will clear the counter, writing any other
>  		value is not allowed.
>  
> +What:		/sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/count_clock
> +Date:		May 2024
> +KernelVersion:	6.10
> +Contact:	"Shravan Kumar Ramani <shravankr@nvidia.com>"
> +Description:
> +		Use a counter for counting cycles. This is used to repurpose/dedicate
> +		any of the counters in the block to counting cycles. Each counter is
> +		represented by a bit (bit 0 for counter0, bit1 for counter1 and so on)
> +		and setting the corresponding bit will reserve that specific counter
> +		for counting cycles and override the event<N> setting.
> +
> +What:		/sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/use_odd_counter
> +Date:		May 2024
> +KernelVersion:	6.10

6.10 ship has already sailed.

> +Contact:	"Shravan Kumar Ramani <shravankr@nvidia.com>"
> +Description:
> +		Form 64-bit counter using 2 32-bit counters. This is used to combine
> +		2 adjacent counters to form a single 64-bit counter. Each even counter
> +		is represented by a bit and setting the bit will join the corresponding
> +		even counter with the next (odd) counter. The full 64-bit value can be
> +		accessed using the same 2 counter<N> and counter<N+1> sysfs, with each
> +		of them holding the lower and upper 32 bits respectively.

Okay, thanks for updating this, it's much clearer now what the intent of 
each file is. One thing that is still unclear whether both bits are 
expected to be set in count_clock when use_odd_counter is used to combine 
two counters?

-- 
 i.