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[139.178.88.99]) by mx.google.com with ESMTPS id 41be03b00d2f7-6e42024e3fbsi1322855a12.652.2024.06.07.13.22.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Jun 2024 13:22:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-206695-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=gxJTMEjj; dkim=neutral (no key) header.i=@linutronix.de; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-206695-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-206695-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 7887E286202 for ; Fri, 7 Jun 2024 20:22:45 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5F6FF154440; Fri, 7 Jun 2024 20:22:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="gxJTMEjj"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="nofRIHje" Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CDB719D89B for ; Fri, 7 Jun 2024 20:22:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717791738; cv=none; b=cKyvjZjI0m0DjCkpJo4czbn2HwbeEH4QvTl/um+j5CTHKBLD6hf5asbUywGCqJkdu5E2Lr94hsyR1lNrEYgWkNm6ZT5qwJiCD0MYVgWkYZtcSt5PeC/rAuR0LTF9Eb+poVKWUCSJwvTumpAIfN1mP2fxPrUGkkroOJMwmnhOvD8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717791738; c=relaxed/simple; bh=4itJeOheO3JCFGYjJsZp2HHj1O9EEO4G3V4kY2AsiVY=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=HQJDACHUU8r+Y4IrleV/8QDP6UtEPmE+O5NlZlYOQDFkGtRREKwRfR1sbRzuQK5OonHyWbAPfX8EWP+TK9TYEDm4zSy0Raz3fNctEC+ktUVVnbRKMsfyEv2jroDySTHOgXeOsjtHsEw+9SghgCrXrVhKYpZegFd8PvAnbFDzYDI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=gxJTMEjj; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=nofRIHje; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1717791734; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xAfTfmpszFUN8R3pQgNHXaFB8SYv5tBzsg3wc1Daekc=; b=gxJTMEjjVsWUXg8QWo8gxk6k6dsK1gOSK8tiVKXP5qTp34PYDSnja7IWgElhx75fYN8tr7 l602j9hesKQoFFE2N+sl62RFmCbIAC0er2w8jwhGeizfJq0wTou/jxVaJ1FadOiltK1VKX mcw5Rniv4bObsJlZxU8kgMXDshp4S1YlKAr9hSGIYjtvYhtc0GdU02f39XNFsYilbM8wPw 8312nbySFzXFPtx2L5HiG5xwvnjOED8vhNJIuLQKM0leerlH6gIu/tvcYgkthd7LTenxky hpaTZounjSwIpPUegA0PssykWkUF8peu71Z3b+LJhdcbDj53w6X7d92mtiyK2g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1717791734; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xAfTfmpszFUN8R3pQgNHXaFB8SYv5tBzsg3wc1Daekc=; b=nofRIHje+QL9kJv7xuUmmYgeTzznlDF8UquGUkvpWA1FtPDrwMFpZchdLaVXLfcVSs9T73 K/C9iB3wE69jeUCg== To: Alexandre Ghiti , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/8] riscv: drop the use of XIP_OFFSET in XIP_FIXUP_OFFSET Date: Fri, 7 Jun 2024 22:22:09 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit XIP_OFFSET is the hard-coded offset of writable data section within the kernel. By hard-coding this value, the read-only section of the kernel (which is placed before the writable data section) is restricted in size. As a preparation to remove this hard-coded macro XIP_OFFSET entirely, stop using XIP_OFFSET in XIP_FIXUP_OFFSET. Instead, use CONFIG_PHYS_RAM_BASE and _sdata to do the same thing. While at it, also add a description for XIP_FIXUP_OFFSET. Signed-off-by: Nam Cao Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/xip_fixup.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h index b65bf6306f69..9ed2cfae09e0 100644 --- a/arch/riscv/include/asm/xip_fixup.h +++ b/arch/riscv/include/asm/xip_fixup.h @@ -9,8 +9,19 @@ #ifdef CONFIG_XIP_KERNEL .macro XIP_FIXUP_OFFSET reg - REG_L t0, _xip_fixup + /* Fix-up address in Flash into address in RAM early during boot before + * MMU is up. Because generated code "thinks" data is in Flash, but it + * is actually in RAM (actually data is also in Flash, but Flash is + * read-only, thus we need to use the data residing in RAM). + * + * The start of data in Flash is _sdata and the start of data in RAM is + * CONFIG_PHYS_RAM_BASE. So this fix-up essentially does this: + * reg += CONFIG_PHYS_RAM_BASE - _start + */ + li t0, CONFIG_PHYS_RAM_BASE add \reg, \reg, t0 + la t0, _sdata + sub \reg, \reg, t0 .endm .macro XIP_FIXUP_FLASH_OFFSET reg la t0, __data_loc @@ -19,7 +30,6 @@ add \reg, \reg, t0 .endm -_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET _xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET #else .macro XIP_FIXUP_OFFSET reg -- 2.39.2