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From: Biju Das <biju.das.jz@bp.renesas.com>
To: kernel test robot <lkp@intel.com>
CC: "oe-kbuild-all@lists.linux.dev" <oe-kbuild-all@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Geert
 Uytterhoeven <geert+renesas@glider.be>
Subject: RE: arch/arm64/boot/dts/renesas/r9a07g043u.dtsi:85.11-94.6: Warning
 (graph_child_address): /soc/video@10830000/ports/port@1: graph node has
 single child node 'endpoint@0', #address-cells/#size-cells are not necessary
Thread-Topic: arch/arm64/boot/dts/renesas/r9a07g043u.dtsi:85.11-94.6: Warning
 (graph_child_address): /soc/video@10830000/ports/port@1: graph node has
 single child node 'endpoint@0', #address-cells/#size-cells are not necessary
Thread-Index: AQHauWXuNNufcFVNdEChjApJ0f0KZLG9jE4Q
Date: Sat, 8 Jun 2024 08:42:56 +0000
Message-ID:
 <TY3PR01MB113468C94F2ED383F5EB883A986C42@TY3PR01MB11346.jpnprd01.prod.outlook.com>
References: <202406081329.snoMrZsJ-lkp@intel.com>
In-Reply-To: <202406081329.snoMrZsJ-lkp@intel.com>
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Hi All,

> -----Original Message-----
> From: kernel test robot <lkp@intel.com>
> Sent: Saturday, June 8, 2024 6:37 AM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: oe-kbuild-all@lists.linux.dev; linux-kernel@vger.kernel.org; Geert Uy=
tterhoeven
> <geert+renesas@glider.be>
> Subject: arch/arm64/boot/dts/renesas/r9a07g043u.dtsi:85.11-94.6: Warning =
(graph_child_address):
> /soc/video@10830000/ports/port@1: graph node has single child node 'endpo=
int@0', #address-
> cells/#size-cells are not necessary
>=20
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.gi=
t master
> head:   dc772f8237f9b0c9ea3f34d0dc4a57d1f6a5070d
> commit: 971c17f879352adc719ff215e0769f8e0a49d7c4 arm64: dts: renesas: r9a=
07g043u: Add CSI and CRU
> nodes
> date:   4 months ago
> compiler: aarch64-linux-gcc (GCC) 13.2.0 reproduce (this is a W=3D1 build=
):
> (https://download.01.org/0day-ci/archive/20240608/202406081329.snoMrZsJ-l=
kp@intel.com/reproduce)

As per this,
dasb@ree-du1sdd5:~/lkp-tests$ mkdir build_dir && cp config build_dir/.confi=
g
cp: cannot stat 'config': No such file or directory

So I have generated .config and copied as config

Than I got the the below issue,
COMPILER_INSTALL_PATH=3D$HOME/0day COMPILER=3Dgcc-13.2.0 ~/lkp-tests/kbuild=
/make.cross W=3D1 O=3Dbuild_dir ARCH=3Darm64 olddefconfig
-bash: /data/dasb/lkp-tests/kbuild/make.cross: No such file or directory

Can you please provide the details how to get this tool chain?

So that I can reproduce and fix the issue in same environment.

Cheers,
Biju

>=20
> If you fix the issue in a separate patch/commit (i.e. not just a new vers=
ion of the same
> patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes:
> | https://lore.kernel.org/oe-kbuild-all/202406081329.snoMrZsJ-lkp@intel.
> | com/
>=20
> dtcheck warnings: (new ones prefixed by >>)
> >> arch/arm64/boot/dts/renesas/r9a07g043u.dtsi:85.11-94.6: Warning
> >> (graph_child_address): /soc/video@10830000/ports/port@1: graph node
> >> has single child node 'endpoint@0', #address-cells/#size-cells are
> >> not necessary
> >> arch/arm64/boot/dts/renesas/r9a07g043u.dtsi:120.11-129.6: Warning
> >> (graph_child_address): /soc/csi2@10830400/ports/port@1: graph node
> >> has single child node 'endpoint@0', #address-cells/#size-cells are
> >> not necessary
>=20
> vim +85 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
>=20
>     60
>     61	&soc {
>     62		interrupt-parent =3D <&gic>;
>     63
>     64		cru: video@10830000 {
>     65			compatible =3D "renesas,r9a07g043-cru", "renesas,rzg2l-cru";
>     66			reg =3D <0 0x10830000 0 0x400>;
>     67			clocks =3D <&cpg CPG_MOD R9A07G043_CRU_VCLK>,
>     68				 <&cpg CPG_MOD R9A07G043_CRU_PCLK>,
>     69				 <&cpg CPG_MOD R9A07G043_CRU_ACLK>;
>     70			clock-names =3D "video", "apb", "axi";
>     71			interrupts =3D <SOC_PERIPHERAL_IRQ(167) IRQ_TYPE_LEVEL_HIGH>,
>     72				     <SOC_PERIPHERAL_IRQ(168) IRQ_TYPE_LEVEL_HIGH>,
>     73				     <SOC_PERIPHERAL_IRQ(169) IRQ_TYPE_LEVEL_HIGH>;
>     74			interrupt-names =3D "image_conv", "image_conv_err", "axi_mst_err=
";
>     75			resets =3D <&cpg R9A07G043_CRU_PRESETN>,
>     76				 <&cpg R9A07G043_CRU_ARESETN>;
>     77			reset-names =3D "presetn", "aresetn";
>     78			power-domains =3D <&cpg>;
>     79			status =3D "disabled";
>     80
>     81			ports {
>     82				#address-cells =3D <1>;
>     83				#size-cells =3D <0>;
>     84
>   > 85				port@1 {
>     86					#address-cells =3D <1>;
>     87					#size-cells =3D <0>;
>     88
>     89					reg =3D <1>;
>     90					crucsi2: endpoint@0 {
>     91						reg =3D <0>;
>     92						remote-endpoint =3D <&csi2cru>;
>     93					};
>     94				};
>     95			};
>     96		};
>     97
>     98		csi2: csi2@10830400 {
>     99			compatible =3D "renesas,r9a07g043-csi2", "renesas,rzg2l-csi2";
>    100			reg =3D <0 0x10830400 0 0xfc00>;
>    101			interrupts =3D <SOC_PERIPHERAL_IRQ(166) IRQ_TYPE_LEVEL_HIGH>;
>    102			clocks =3D <&cpg CPG_MOD R9A07G043_CRU_SYSCLK>,
>    103				 <&cpg CPG_MOD R9A07G043_CRU_VCLK>,
>    104				 <&cpg CPG_MOD R9A07G043_CRU_PCLK>;
>    105			clock-names =3D "system", "video", "apb";
>    106			resets =3D <&cpg R9A07G043_CRU_PRESETN>,
>    107				 <&cpg R9A07G043_CRU_CMN_RSTB>;
>    108			reset-names =3D "presetn", "cmn-rstb";
>    109			power-domains =3D <&cpg>;
>    110			status =3D "disabled";
>    111
>    112			ports {
>    113				#address-cells =3D <1>;
>    114				#size-cells =3D <0>;
>    115
>    116				port@0 {
>    117					reg =3D <0>;
>    118				};
>    119
>  > 120				port@1 {
>    121					#address-cells =3D <1>;
>    122					#size-cells =3D <0>;
>    123					reg =3D <1>;
>    124
>    125					csi2cru: endpoint@0 {
>    126						reg =3D <0>;
>    127						remote-endpoint =3D <&crucsi2>;
>    128					};
>    129				};
>    130			};
>    131		};
>    132
>    133		irqc: interrupt-controller@110a0000 {
>    134			compatible =3D "renesas,r9a07g043u-irqc",
>    135				     "renesas,rzg2l-irqc";
>    136			reg =3D <0 0x110a0000 0 0x10000>;
>    137			#interrupt-cells =3D <2>;
>    138			#address-cells =3D <0>;
>    139			interrupt-controller;
>    140			interrupts =3D <SOC_PERIPHERAL_IRQ(0) IRQ_TYPE_LEVEL_HIGH>,
>    141				     <SOC_PERIPHERAL_IRQ(1) IRQ_TYPE_LEVEL_HIGH>,
>    142				     <SOC_PERIPHERAL_IRQ(2) IRQ_TYPE_LEVEL_HIGH>,
>    143				     <SOC_PERIPHERAL_IRQ(3) IRQ_TYPE_LEVEL_HIGH>,
>    144				     <SOC_PERIPHERAL_IRQ(4) IRQ_TYPE_LEVEL_HIGH>,
>    145				     <SOC_PERIPHERAL_IRQ(5) IRQ_TYPE_LEVEL_HIGH>,
>    146				     <SOC_PERIPHERAL_IRQ(6) IRQ_TYPE_LEVEL_HIGH>,
>    147				     <SOC_PERIPHERAL_IRQ(7) IRQ_TYPE_LEVEL_HIGH>,
>    148				     <SOC_PERIPHERAL_IRQ(8) IRQ_TYPE_LEVEL_HIGH>,
>    149				     <SOC_PERIPHERAL_IRQ(444) IRQ_TYPE_LEVEL_HIGH>,
>    150				     <SOC_PERIPHERAL_IRQ(445) IRQ_TYPE_LEVEL_HIGH>,
>    151				     <SOC_PERIPHERAL_IRQ(446) IRQ_TYPE_LEVEL_HIGH>,
>    152				     <SOC_PERIPHERAL_IRQ(447) IRQ_TYPE_LEVEL_HIGH>,
>    153				     <SOC_PERIPHERAL_IRQ(448) IRQ_TYPE_LEVEL_HIGH>,
>    154				     <SOC_PERIPHERAL_IRQ(449) IRQ_TYPE_LEVEL_HIGH>,
>    155				     <SOC_PERIPHERAL_IRQ(450) IRQ_TYPE_LEVEL_HIGH>,
>    156				     <SOC_PERIPHERAL_IRQ(451) IRQ_TYPE_LEVEL_HIGH>,
>    157				     <SOC_PERIPHERAL_IRQ(452) IRQ_TYPE_LEVEL_HIGH>,
>    158				     <SOC_PERIPHERAL_IRQ(453) IRQ_TYPE_LEVEL_HIGH>,
>    159				     <SOC_PERIPHERAL_IRQ(454) IRQ_TYPE_LEVEL_HIGH>,
>    160				     <SOC_PERIPHERAL_IRQ(455) IRQ_TYPE_LEVEL_HIGH>,
>    161				     <SOC_PERIPHERAL_IRQ(456) IRQ_TYPE_LEVEL_HIGH>,
>    162				     <SOC_PERIPHERAL_IRQ(457) IRQ_TYPE_LEVEL_HIGH>,
>    163				     <SOC_PERIPHERAL_IRQ(458) IRQ_TYPE_LEVEL_HIGH>,
>    164				     <SOC_PERIPHERAL_IRQ(459) IRQ_TYPE_LEVEL_HIGH>,
>    165				     <SOC_PERIPHERAL_IRQ(460) IRQ_TYPE_LEVEL_HIGH>,
>    166				     <SOC_PERIPHERAL_IRQ(461) IRQ_TYPE_LEVEL_HIGH>,
>    167				     <SOC_PERIPHERAL_IRQ(462) IRQ_TYPE_LEVEL_HIGH>,
>    168				     <SOC_PERIPHERAL_IRQ(463) IRQ_TYPE_LEVEL_HIGH>,
>    169				     <SOC_PERIPHERAL_IRQ(464) IRQ_TYPE_LEVEL_HIGH>,
>    170				     <SOC_PERIPHERAL_IRQ(465) IRQ_TYPE_LEVEL_HIGH>,
>    171				     <SOC_PERIPHERAL_IRQ(466) IRQ_TYPE_LEVEL_HIGH>,
>    172				     <SOC_PERIPHERAL_IRQ(467) IRQ_TYPE_LEVEL_HIGH>,
>    173				     <SOC_PERIPHERAL_IRQ(468) IRQ_TYPE_LEVEL_HIGH>,
>    174				     <SOC_PERIPHERAL_IRQ(469) IRQ_TYPE_LEVEL_HIGH>,
>    175				     <SOC_PERIPHERAL_IRQ(470) IRQ_TYPE_LEVEL_HIGH>,
>    176				     <SOC_PERIPHERAL_IRQ(471) IRQ_TYPE_LEVEL_HIGH>,
>    177				     <SOC_PERIPHERAL_IRQ(472) IRQ_TYPE_LEVEL_HIGH>,
>    178				     <SOC_PERIPHERAL_IRQ(473) IRQ_TYPE_LEVEL_HIGH>,
>    179				     <SOC_PERIPHERAL_IRQ(474) IRQ_TYPE_LEVEL_HIGH>,
>    180				     <SOC_PERIPHERAL_IRQ(475) IRQ_TYPE_LEVEL_HIGH>,
>    181				     <SOC_PERIPHERAL_IRQ(25) IRQ_TYPE_EDGE_RISING>;
>    182			interrupt-names =3D "nmi",
>    183					  "irq0", "irq1", "irq2", "irq3",
>    184					  "irq4", "irq5", "irq6", "irq7",
>    185					  "tint0", "tint1", "tint2", "tint3",
>    186					  "tint4", "tint5", "tint6", "tint7",
>    187					  "tint8", "tint9", "tint10", "tint11",
>    188					  "tint12", "tint13", "tint14", "tint15",
>    189					  "tint16", "tint17", "tint18", "tint19",
>    190					  "tint20", "tint21", "tint22", "tint23",
>    191					  "tint24", "tint25", "tint26", "tint27",
>    192					  "tint28", "tint29", "tint30", "tint31",
>    193					  "bus-err";
>    194			clocks =3D <&cpg CPG_MOD R9A07G043_IA55_CLK>,
>    195				<&cpg CPG_MOD R9A07G043_IA55_PCLK>;
>    196			clock-names =3D "clk", "pclk";
>    197			power-domains =3D <&cpg>;
>    198			resets =3D <&cpg R9A07G043_IA55_RESETN>;
>    199		};
>    200
>    201		gic: interrupt-controller@11900000 {
>    202			compatible =3D "arm,gic-v3";
>    203			#interrupt-cells =3D <3>;
>    204			#address-cells =3D <0>;
>    205			interrupt-controller;
>    206			reg =3D <0x0 0x11900000 0 0x40000>,
>    207			      <0x0 0x11940000 0 0x60000>;
>    208			interrupts =3D <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
>    209		};
>    210	};
>    211
>=20
> --
> 0-DAY CI Kernel Test Service
> https://github.com/intel/lkp-tests/wiki