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AJvYcCXQTS2+qSBiSHXrRN2tQ8CZwvlePy7TqT8vVMXbh6WmWjXDE4zu5l/8ph3IdXCbLi56oH1I7BTJiEHglG7ew71OQpKdTP3yzzr70UKU X-Gm-Message-State: AOJu0YycNeKOIQeASP+mLPQmcE6LczH3E1KC3SeS2gIn9gR8Bo6P+EKq YJmS8jEqii9obxjlMyzIasWiIF9OXb/qpctpl/H6NnRIopIJxYAm4quvMpsFBhX5ylGHbrus7pi XvnnJBYNOza9EIFDeP+WKoTXggCAs5Fk0ZxDw9jMZMk8Oegynp/4C9sDJ02QJe9vk6YaneEJEDH Fh8L6BDo4uIedWpct0oEmoWb7XNBIRCYF7cCqR X-Received: by 2002:a05:6a20:9708:b0:1b0:18d1:c46c with SMTP id adf61e73a8af0-1b2f9aaf538mr3497919637.27.1717837715780; Sat, 08 Jun 2024 02:08:35 -0700 (PDT) X-Received: by 2002:a05:6a20:9708:b0:1b0:18d1:c46c with SMTP id adf61e73a8af0-1b2f9aaf538mr3497906637.27.1717837715440; Sat, 08 Jun 2024 02:08:35 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240530210714.364118-1-rick.p.edgecombe@intel.com> <20240530210714.364118-7-rick.p.edgecombe@intel.com> <9423e6b83523c0a3828a88f38ffc3275a08e11dd.camel@intel.com> In-Reply-To: <9423e6b83523c0a3828a88f38ffc3275a08e11dd.camel@intel.com> From: Paolo Bonzini Date: Sat, 8 Jun 2024 11:08:21 +0200 Message-ID: Subject: Re: [PATCH v2 06/15] KVM: x86/mmu: Support GFN direct mask To: "Edgecombe, Rick P" Cc: "seanjc@google.com" , "Huang, Kai" , "sagis@google.com" , "linux-kernel@vger.kernel.org" , "Aktas, Erdem" , "Zhao, Yan Y" , "dmatlack@google.com" , "kvm@vger.kernel.org" , "Yamahata, Isaku" , "isaku.yamahata@gmail.com" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Jun 7, 2024 at 8:39=E2=80=AFPM Edgecombe, Rick P wrote: > > I think the code need not check kvm_gfn_direct_mask() here? In the old > > patches that I have it check kvm_gfn_direct_mask() in the vmx/main.c > > callback. > > You mean a VMX/TDX implementation of flush_remote_tlbs_range that just re= turns > -EOPNOTSUPP? Which version of the patches is this? I couldn't find anythi= ng like > that. Something from Intel's GitHub, roughly June 2023... Looking at the whole history, it starts with if (!kvm_x86_ops.flush_remote_tlbs_range) return -EOPNOTSUPP; return static_call(kvm_x86_flush_remote_tlbs_range)(kvm, gfn, nr_pages= ); and it only assigns the callback in vmx.c (not main.c); then it adds an implementation of the callback for TDX that has: static int vt_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn, gfn_t nr_pages) { if (is_td(kvm)) return tdx_sept_flush_remote_tlbs_range(kvm, gfn, nr_pages)= ; /* fallback to flush_remote_tlbs method */ return -EOPNOTSUPP; } where the callback knows that it should flush both private GFN and shared GFN. So I didn't remember it correctly, but still there is no check for the presence of direct-mapping bits. > The downside would be wider distribution of the concerns for dealing with > multiple aliases for a GFN. Currently, the behavior to have multiple alia= ses is > implemented in core MMU code. While it's fine to pollute tdx.c with TDX s= pecific > knowledge of course, removing the handling of this corner from mmu.c migh= t make > it less understandable for non-tdx readers who are working in MMU code. > Basically, if a concept fits into some non-TDX abstraction like this, hav= ing it > in core code seems the better default to me. I am not sure why it's an MMU concept that "if you offset the shared mappings you cannot implement flush_remote_tlbs_range". It seems more like, you need to know what you're doing? Right now it makes no difference because you don't set the callback; but if you ever wanted to implement flush_remote_tlbs_range as an optimization you'd have to remove the condition from the "if". So it's better not to have it in the first place. Perhaps add a comment instead, like: if (!kvm_x86_ops.flush_remote_tlbs_range) return -EOPNOTSUPP; + /* + * If applicable, the callback should flush GFNs both with and without + * the direct-mapping bits. + */ return static_call(kvm_x86_flush_remote_tlbs_range)(kvm, gfn, nr_pages= ); Paolo