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[2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id d9443c01a7336-1f6bd76c628si44278615ad.135.2024.06.08.02.47.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jun 2024 02:47:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-207000-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel+bounces-207000-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-207000-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 80E66281E41 for ; Sat, 8 Jun 2024 09:47:51 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 88A83176FB8; Sat, 8 Jun 2024 09:47:45 +0000 (UTC) Received: from fgw21-7.mail.saunalahti.fi (fgw21-7.mail.saunalahti.fi [62.142.5.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B7691EB40 for ; Sat, 8 Jun 2024 09:47:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.82 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717840065; cv=none; b=GiXJEwX7yBzJFj+krF2UlTf+8vMUXEwSP/Ci7p60j7KyEUh8EEvEWojKhDQC/qbT24yg3HzzwfLAY/WKgbTQakT8Rl43hqE8rdcUk3RcxlevSQgK1G8/emouZcHNAWkEC9dsvB5+jAWFIL8XljHXsazRhTatkZduhEekDUka5yI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717840065; c=relaxed/simple; bh=JqOtTvqw7uV/u0K6rQtsNQAPJjZEb7jqnR2ekLIN1YA=; h=From:Date:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=j+RK/VGp7TuYocetCL5AFeLFFYOpkbrJu6i9XMOCho7dDjgvl9sCqAdXUKcFaGpyVDmDgk6JPKAWGXq2o4SyzPQ3uqnx6qot3MEbwfIOj7I2na50dkLPHRNRwlxoOVlY5XDYbxrngbfRp1naYHOuwa6rCdgTwzlN4wgMFR0bW9I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.82 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw20.mail.saunalahti.fi (Halon) with ESMTP id 25790f07-257c-11ef-8d59-005056bd6ce9; Sat, 08 Jun 2024 12:47:41 +0300 (EEST) From: Andy Shevchenko Date: Sat, 8 Jun 2024 12:47:40 +0300 To: Crescent Hsieh Cc: Jiri Slaby , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Subject: Re: [PATCH 0/6] Adjustments and Enhancements for MOXA PCI Serial Boards Message-ID: References: <20240607114336.4496-1-crescentcy.hsieh@moxa.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240607114336.4496-1-crescentcy.hsieh@moxa.com> Fri, Jun 07, 2024 at 07:43:30PM +0800, Crescent Hsieh kirjoitti: > There are 6 patches within this patch series to make some adjustments > and enhancements for MOXA PCI serial boards, a briefly description is > written below: > > - The first patch is an independent bug fix patch. > - The second and third patches migrate some MOXA PCI devices from > `mxser.c` to `8250_pci.c`. > - The fourth and fifth patches address improvements and adjustments in > handling the serial interface. > - The sixth patch adds a UART configuration that aligns with the > hardware capabilities of MOXA PCI serial boards. Everything is fine except one issue. Can we avoid polluting 8250_pci? What I would expect as a patch 2 is a separation of 8250_moxa from 8250_pci (see examples how it was done in the past: 8250_exar, 8250_lpss, 8250_mid, ...) and then updating code there. Can it be achievable? -- With Best Regards, Andy Shevchenko