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Mon, 10 Jun 2024 09:56:20 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 60AF7211940; Mon, 10 Jun 2024 09:55:07 +0200 (CEST) Received: from [10.48.86.164] (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 10 Jun 2024 09:55:06 +0200 Message-ID: <908c2e86-8255-4e76-8665-0b7d02853681@foss.st.com> Date: Mon, 10 Jun 2024 09:55:05 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 09/12] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13 To: Marek Vasut , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown CC: , , , , References: <20240607095754.265105-1-christophe.roullier@foss.st.com> <20240607095754.265105-10-christophe.roullier@foss.st.com> <6d60bbc6-5ed3-4bb1-ad72-18a2be140b81@denx.de> Content-Language: en-US From: Christophe ROULLIER In-Reply-To: <6d60bbc6-5ed3-4bb1-ad72-18a2be140b81@denx.de> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-10_02,2024-06-06_02,2024-05-17_01 On 6/7/24 14:48, Marek Vasut wrote: > On 6/7/24 11:57 AM, Christophe Roullier wrote: > > [...] > >> @@ -1505,6 +1511,38 @@ sdmmc2: mmc@58007000 { >>                   status = "disabled"; >>               }; >>   +            ethernet1: ethernet@5800a000 { >> +                compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a"; >> +                reg = <0x5800a000 0x2000>; >> +                reg-names = "stmmaceth"; >> +                interrupts-extended = <&intc GIC_SPI 62 >> IRQ_TYPE_LEVEL_HIGH>, >> +                              <&exti 68 1>; >> +                interrupt-names = "macirq", "eth_wake_irq"; >> +                clock-names = "stmmaceth", >> +                          "mac-clk-tx", >> +                          "mac-clk-rx", >> +                          "ethstp", >> +                          "eth-ck"; >> +                clocks = <&rcc ETH1MAC>, >> +                     <&rcc ETH1TX>, >> +                     <&rcc ETH1RX>, >> +                     <&rcc ETH1STP>, >> +                     <&rcc ETH1CK_K>; >> +                st,syscon = <&syscfg 0x4 0xff0000>; >> +                snps,mixed-burst; >> +                snps,pbl = <2>; >> +                snps,axi-config = <&stmmac_axi_config_1>; >> +                snps,tso; >> +                access-controllers = <&etzpc 48>; > > Keep the list sorted. Hi Marek, As already explained, all MP13 IPs have this property before "status". If we must move this property, we will do it later and do it for all IPs. Thanks