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Mon, 10 Jun 2024 03:32:35 -0700 (PDT) From: Jerome Brunet To: neil.armstrong@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, martin.blumenstingl@googlemail.com, Dmitry Rokosov Cc: jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org In-Reply-To: <20240515185103.20256-1-ddrokosov@salutedevices.com> References: <20240515185103.20256-1-ddrokosov@salutedevices.com> Subject: Re: (subset) [PATCH v3 0/7] clk: meson: introduce Amlogic A1 SoC Family CPU clock controller driver Message-Id: <171801555454.91134.14151750531513287014.b4-ty@baylibre.com> Date: Mon, 10 Jun 2024 12:32:34 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.13.0 Applied to clk-meson (v6.11/drivers), thanks! [1/7] clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL https://github.com/BayLibre/clk-meson/commit/d4c83ac16c65 [2/7] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings https://github.com/BayLibre/clk-meson/commit/96f3b9787363 [4/7] dt-bindings: clock: meson: a1: peripherals: support sys_pll input https://github.com/BayLibre/clk-meson/commit/41056416ed53 Best regards, -- Jerome