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Message-ID: <91af5c61-f23f-4f72-a8c8-f32b2c368768@foss.st.com>
Date: Mon, 10 Jun 2024 15:49:58 +0200
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Subject: Re: [net-next,PATCH v6 7/8] net: stmmac: dwmac-stm32: Mask support
 for PMCR configuration
To: Marek Vasut <marex@denx.de>, "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>,
        Paolo
 Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof
 Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley
	<conor+dt@kernel.org>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Alexandre
 Torgue <alexandre.torgue@foss.st.com>,
        Richard Cochran
	<richardcochran@gmail.com>,
        Jose Abreu <joabreu@synopsys.com>,
        Liam Girdwood
	<lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>
CC: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-stm32@st-md-mailman.stormreply.com>,
        <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>
References: <20240610071459.287500-1-christophe.roullier@foss.st.com>
 <20240610071459.287500-8-christophe.roullier@foss.st.com>
 <20139233-4e95-4fe5-84ca-734ee866afca@denx.de>
 <c5ea12e7-5ee6-4960-9141-e774ccd9977b@foss.st.com>
 <09105afe-1123-407a-96c3-2ea88602aad0@denx.de>
Content-Language: en-US
From: Christophe ROULLIER <christophe.roullier@foss.st.com>
In-Reply-To: <09105afe-1123-407a-96c3-2ea88602aad0@denx.de>
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On 6/10/24 15:43, Marek Vasut wrote:
> On 6/10/24 1:45 PM, Christophe ROULLIER wrote:
>>
>> On 6/10/24 12:39, Marek Vasut wrote:
>>> On 6/10/24 9:14 AM, Christophe Roullier wrote:
>>>
>>> [...]
>>>
>>>>   static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
>>>> @@ -303,7 +307,7 @@ static int stm32mcu_set_mode(struct 
>>>> plat_stmmacenet_data *plat_dat)
>>>>       dev_dbg(dwmac->dev, "Mode %s", 
>>>> phy_modes(plat_dat->mac_interface));
>>>>         return regmap_update_bits(dwmac->regmap, reg,
>>>> -                 dwmac->ops->syscfg_eth_mask, val << 23);
>>>> +                 SYSCFG_MCU_ETH_MASK, val << 23);
>>>>   }
>>>>     static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac, 
>>>> bool suspend)
>>>> @@ -348,8 +352,15 @@ static int stm32_dwmac_parse_data(struct 
>>>> stm32_dwmac *dwmac,
>>>>           return PTR_ERR(dwmac->regmap);
>>>>         err = of_property_read_u32_index(np, "st,syscon", 1, 
>>>> &dwmac->mode_reg);
>>>> -    if (err)
>>>> +    if (err) {
>>>>           dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
>>>> +        return err;
>>>> +    }
>>>> +
>>>> +    dwmac->mode_mask = SYSCFG_MP1_ETH_MASK;
>>>> +    err = of_property_read_u32_index(np, "st,syscon", 2, 
>>>> &dwmac->mode_mask);
>>>> +    if (err)
>>>> +        dev_dbg(dev, "Warning sysconfig register mask not set\n");
>>>
>>> Isn't this an error , so dev_err() ?
>> No, it is only "warning" information, for MP1 the mask is not needed 
>> (and for backward compatibility is not planned to put mask parameter 
>> mandatory)
>
> Should this be an error for anything newer than MP15 then ?
For MP25, no need of mask, so for moment it is specific to MP13.