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AJvYcCV7t/Ilj3rBeAPuJi+1ZUfnAgfOV0vxqhKe/GrcPGqvGNGWAsZx//ZwYBt4yXdQHWrdQnM2Q+YVKTbYmJ0iy0BVmmY0fwVDmZTPRYMz X-Gm-Message-State: AOJu0YwbeYaiFwiYCDSc/UPkFFwjLoPG37Dqgt43BfFL6nZOAl6pUiH+ SS+veyUnafeqcyIOn0YbI9EwtRYajnqh1H2ztFTZ+qQ8DjJIgGDpy6DI6+DbFA== X-Received: by 2002:a17:902:c406:b0:1f6:7212:75f0 with SMTP id d9443c01a7336-1f6d02e234emr130658925ad.17.1718058350584; Mon, 10 Jun 2024 15:25:50 -0700 (PDT) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:bba2:69f4:1b51:d0f5]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f71029e223sm29212325ad.170.2024.06.10.15.25.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Jun 2024 15:25:49 -0700 (PDT) From: Douglas Anderson To: Greg Kroah-Hartman , Jiri Slaby Cc: Yicong Yang , Tony Lindgren , Andy Shevchenko , Johan Hovold , John Ogness , linux-arm-msm@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Stephen Boyd , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Douglas Anderson , Rob Herring , Vijaya Krishna Nivarthi Subject: [PATCH v4 5/8] serial: qcom-geni: Introduce qcom_geni_serial_poll_bitfield() Date: Mon, 10 Jun 2024 15:24:23 -0700 Message-ID: <20240610152420.v4.5.Ic6411eab8d9d37acc451705f583fb535cd6dadb2@changeid> X-Mailer: git-send-email 2.45.2.505.gda0bf45e8d-goog In-Reply-To: <20240610222515.3023730-1-dianders@chromium.org> References: <20240610222515.3023730-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit With a small modification the qcom_geni_serial_poll_bit() function could be used to poll more than just a single bit. Let's generalize it. We'll make the qcom_geni_serial_poll_bit() into just a wrapper of the general function. Signed-off-by: Douglas Anderson --- The new function isn't used yet (except by the wrapper) but will be used in a future change. (no changes since v2) Changes in v2: - New drivers/tty/serial/qcom_geni_serial.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index db933a1549ad..bd03b998ed04 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -264,8 +264,8 @@ static bool qcom_geni_serial_secondary_active(struct uart_port *uport) return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE; } -static bool qcom_geni_serial_poll_bit(struct uart_port *uport, - unsigned int offset, u32 field, bool set) +static bool qcom_geni_serial_poll_bitfield(struct uart_port *uport, + unsigned int offset, u32 field, u32 val) { u32 reg; unsigned long timeout_us; @@ -294,7 +294,7 @@ static bool qcom_geni_serial_poll_bit(struct uart_port *uport, */ while (timeout_us) { reg = readl(uport->membase + offset); - if ((bool)(reg & field) == set) + if ((reg & field) == val) return true; udelay(10); timeout_us -= 10; @@ -302,6 +302,12 @@ static bool qcom_geni_serial_poll_bit(struct uart_port *uport, return false; } +static bool qcom_geni_serial_poll_bit(struct uart_port *uport, + unsigned int offset, u32 field, bool set) +{ + return qcom_geni_serial_poll_bitfield(uport, offset, field, set ? field : 0); +} + static void qcom_geni_serial_setup_tx(struct uart_port *uport, u32 xmit_size) { u32 m_cmd; -- 2.45.2.505.gda0bf45e8d-goog