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Mon, 10 Jun 2024 17:44:18 -0700 Date: Mon, 10 Jun 2024 17:44:16 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: "Tian, Kevin" , "will@kernel.org" , "robin.murphy@arm.com" , "suravee.suthikulpanit@amd.com" , "joro@8bytes.org" , "linux-kernel@vger.kernel.org" , "iommu@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , "linux-tegra@vger.kernel.org" , "Liu, Yi L" , "eric.auger@redhat.com" , "vasant.hegde@amd.com" , "jon.grimm@amd.com" , "santosh.shukla@amd.com" , "Dhaval.Giani@amd.com" , "shameerali.kolothum.thodi@huawei.com" Subject: Re: [PATCH RFCv1 08/14] iommufd: Add IOMMU_VIOMMU_SET_DEV_ID ioctl Message-ID: References: <20240607002707.GJ19897@nvidia.com> <20240607144917.GK19897@nvidia.com> <20240610120446.GP19897@nvidia.com> <20240610220110.GQ19897@nvidia.com> <20240611002839.GS19897@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240611002839.GS19897@nvidia.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B5:EE_|CY5PR12MB6203:EE_ X-MS-Office365-Filtering-Correlation-Id: 57a6151f-d794-41d8-372c-08dc89afa194 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|7416005|1800799015|376005|82310400017; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jun 2024 00:44:20.1488 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 57a6151f-d794-41d8-372c-08dc89afa194 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6203 On Mon, Jun 10, 2024 at 09:28:39PM -0300, Jason Gunthorpe wrote: > On Mon, Jun 10, 2024 at 04:04:30PM -0700, Nicolin Chen wrote: > > > > > Actually, even now as we put a dispatcher in VMM, VMM still does > > > > decode the CD table to link ASID to s1_hwpt. Otherwise, it could > > > > only broadcast a TLBI cmd to all pSMMUs. > > > > > > No, there should be no CD table decoding and no linking ASID to > > > anything by the VMM. > > > > > > The ARM architecture is clean, the ASID can remain private to the VM, > > > there is no reason for the VMM to understand it. > > > > But a guest-level TLBI command usually has only ASID available to > > know which pSMMU to dispatch the command. Without an ASID lookup > > table, how could VMM then dispatch a command to the corresponding > > pSMMU? > > It can broadcast. The ARM architecture does not expect a N:1 mapping > of SMMUs. This is why I think it is not such a good idea.. Hmm, I thought we had an agreed idea that we shouldn't broadcast a TLBI (except global NH_ALL/VAA) for invalidation performance? > Yes the VMM could walk the CD tables too and build up a bitmap of what > ASIDs are being used by what pSMMUs, and that would be fine for the > VMM to do, but I wouldn't necessarily recommend it :) CD table walkthrough would be always done only by VMM, while the lookup table could be created/maintained by the kernel. I feel a vasid table could make sense since we maintain the vdev_id table in the kernel space too. Anyway, it is still an implementation choice, as Kevin remarked. Thanks Nicolin