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From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: andrew@lunn.ch,
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	linux@armlinux.org.uk,
	davem@davemloft.net,
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	kuba@kernel.org,
	pabeni@redhat.com
Cc: netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Chris Packham <chris.packham@alliedtelesis.co.nz>
Subject: [PATCH next-next] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
Date: Tue, 11 Jun 2024 17:34:14 +1200
Message-ID: <20240611053415.2111723-1-chris.packham@alliedtelesis.co.nz>
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The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
clause 45 MDIO interface and can leverage the support that has already
been added for the other 822x PHYs.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    I'm currently testing this on an older kernel because the board I'm
    using has a SOC/DSA switch that has a driver in openwrt for Linux 5.1=
5.
    I have tried to selectively back port the bits I need from the other
    rtl822x work so this should be all that is required for the rtl8224.
   =20
    There's quite a lot that would need forward porting get a working sys=
tem
    against a current kernel so hopefully this is small enough that it ca=
n
    land while I'm trying to figure out how to untangle all the other bit=
s.
   =20
    One thing that may appear lacking is the lack of rate_matching suppor=
t.
    According to the documentation I have know the interface used on the
    RTL8224 is (q)uxsgmii so no rate matching is required. As I'm still
    trying to get things completely working that may change if I get new
    information.

 drivers/net/phy/realtek.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 7ab41f95dae5..2174893c974f 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1317,6 +1317,14 @@ static struct phy_driver realtek_drvs[] =3D {
 		.resume         =3D rtlgen_resume,
 		.read_page      =3D rtl821x_read_page,
 		.write_page     =3D rtl821x_write_page,
+	}, {
+		PHY_ID_MATCH_EXACT(0x001ccad0),
+		.name		=3D "RTL8224 2.5Gbps PHY",
+		.get_features   =3D rtl822x_c45_get_features,
+		.config_aneg    =3D rtl822x_c45_config_aneg,
+		.read_status    =3D rtl822x_c45_read_status,
+		.suspend        =3D genphy_c45_pma_suspend,
+		.resume         =3D rtlgen_c45_resume,
 	}, {
 		PHY_ID_MATCH_EXACT(0x001cc961),
 		.name		=3D "RTL8366RB Gigabit Ethernet",
--=20
2.45.2