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Tue, 11 Jun 2024 08:43:51 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2C85220E1EF; Tue, 11 Jun 2024 08:42:38 +0200 (CEST) Received: from [10.48.86.164] (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 11 Jun 2024 08:42:35 +0200 Message-ID: Date: Tue, 11 Jun 2024 08:42:35 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [net-next,PATCH v6 7/8] net: stmmac: dwmac-stm32: Mask support for PMCR configuration To: Marek Vasut , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown CC: , , , , References: <20240610071459.287500-1-christophe.roullier@foss.st.com> <20240610071459.287500-8-christophe.roullier@foss.st.com> <20139233-4e95-4fe5-84ca-734ee866afca@denx.de> <09105afe-1123-407a-96c3-2ea88602aad0@denx.de> <91af5c61-f23f-4f72-a8c8-f32b2c368768@foss.st.com> Content-Language: en-US From: Christophe ROULLIER In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-11_02,2024-06-11_01,2024-05-17_01 On 6/10/24 19:29, Marek Vasut wrote: > On 6/10/24 3:49 PM, Christophe ROULLIER wrote: >> >> On 6/10/24 15:43, Marek Vasut wrote: >>> On 6/10/24 1:45 PM, Christophe ROULLIER wrote: >>>> >>>> On 6/10/24 12:39, Marek Vasut wrote: >>>>> On 6/10/24 9:14 AM, Christophe Roullier wrote: >>>>> >>>>> [...] >>>>> >>>>>>   static int stm32mp1_set_mode(struct plat_stmmacenet_data >>>>>> *plat_dat) >>>>>> @@ -303,7 +307,7 @@ static int stm32mcu_set_mode(struct >>>>>> plat_stmmacenet_data *plat_dat) >>>>>>       dev_dbg(dwmac->dev, "Mode %s", >>>>>> phy_modes(plat_dat->mac_interface)); >>>>>>         return regmap_update_bits(dwmac->regmap, reg, >>>>>> -                 dwmac->ops->syscfg_eth_mask, val << 23); >>>>>> +                 SYSCFG_MCU_ETH_MASK, val << 23); >>>>>>   } >>>>>>     static void stm32_dwmac_clk_disable(struct stm32_dwmac >>>>>> *dwmac, bool suspend) >>>>>> @@ -348,8 +352,15 @@ static int stm32_dwmac_parse_data(struct >>>>>> stm32_dwmac *dwmac, >>>>>>           return PTR_ERR(dwmac->regmap); >>>>>>         err = of_property_read_u32_index(np, "st,syscon", 1, >>>>>> &dwmac->mode_reg); >>>>>> -    if (err) >>>>>> +    if (err) { >>>>>>           dev_err(dev, "Can't get sysconfig mode offset (%d)\n", >>>>>> err); >>>>>> +        return err; >>>>>> +    } >>>>>> + >>>>>> +    dwmac->mode_mask = SYSCFG_MP1_ETH_MASK; >>>>>> +    err = of_property_read_u32_index(np, "st,syscon", 2, >>>>>> &dwmac->mode_mask); >>>>>> +    if (err) >>>>>> +        dev_dbg(dev, "Warning sysconfig register mask not set\n"); >>>>> >>>>> Isn't this an error , so dev_err() ? >>>> No, it is only "warning" information, for MP1 the mask is not >>>> needed (and for backward compatibility is not planned to put mask >>>> parameter mandatory) >>> >>> Should this be an error for anything newer than MP15 then ? >> For MP25, no need of mask, so for moment it is specific to MP13. > > Make this a warning for MP15, error for MP13, do not check st,syscon > presence for MP2 at all. Would that work ? Ok I will make a warning for MP15 and MP25 and error for MP13.