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Tue, 11 Jun 2024 04:10:48 -0500 Received: from [172.24.227.94] (uda0132425.dhcp.ti.com [172.24.227.94]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45B9Ah2F073692; Tue, 11 Jun 2024 04:10:44 -0500 Message-ID: <9e7d3f9b-c762-40cd-9d0d-2f071aa3c371@ti.com> Date: Tue, 11 Jun 2024 14:40:43 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/7] arm64: dts: ti: am62p: Rename am62p-{}.dtsi to am62p-j722s-common-{}.dtsi To: Siddharth Vadapalli , Roger Quadros CC: , , , , , , , , , , , References: <20240604085252.3686037-1-s-vadapalli@ti.com> <20240604085252.3686037-2-s-vadapalli@ti.com> <92af5f36-0c21-4b6e-adde-fcf21b540291@kernel.org> <902f024a-b0a1-4a0a-94e2-7cec064a91c6@ti.com> <6959494a-98ba-4ccf-973c-14d079b76f27@kernel.org> <975c90b1-6657-40c6-a336-7f1f58acf531@ti.com> From: Vignesh Raghavendra Content-Language: en-US In-Reply-To: <975c90b1-6657-40c6-a336-7f1f58acf531@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 11/06/24 14:24, Siddharth Vadapalli wrote: > On Mon, Jun 10, 2024 at 10:31:07PM +0300, Roger Quadros wrote: > > [...] > >>> Based on your suggestion, you seem to propose the following hierarchy: >>> k3-am62p-{main,mcu,thermal,wakeup}.dtsi = AM62P specific data >>> k3-am62p.dtsi = k3-am62p-j722s-common-main.dtsi + >>> k3-am62p-j722s-common-mcu.dtsi + >>> k3-am62p-j722s-common-wakeup.dtsi + >>> k3-am62p-j722s-common-thermal.dtsi + >>> k3-am62p-{main,mcu,thermal,wakeup}.dtsi + >>> >>> k3-am62p5.dtsi = k3-am62p.dtsi + >>> k3-j722s-{main,mcu,thermal,wakeup}.dtsi = J722S specific data >>> k3-j722s.dtsi = k3-am62p-j722s-common-main.dtsi + >>> k3-am62p-j722s-common-mcu.dtsi + >>> k3-am62p-j722s-common-wakeup.dtsi + >>> k3-am62p-j722s-common-thermal.dtsi + >>> k3-j722s-{main,mcu,thermal,wakeup}.dtsi + >>> >> >> What is the equivalent of k3-am62p5.dtsi here? >> That should contain k3-j722s.dtsi + CPU and OPP stuff. >> >> I suppose it should be named specific to the SoC variant part number? > > AM62P (https://www.ti.com/product/AM62P) has two variants: > 1. 2 Arm Cortex-A53 => AM62P3 > 2. 4 Arm Cortex-A53 => AM62P5 > Both variants will share the common k3-am62p.dtsi > > J722S (https://www.ti.com/product/TDA4VEN-Q1) has only one variant: > 4 Arm Cortex-A53 => J722S > Which is currently identical to AM62P5 w.r.t. the number of A53s. > > So there isn't an equivalent of AM62P5/k3-am62p5.dtsi for J722S. > k3-j722s.dtsi is a combination of k3-am62p.dtsi and k3-am62p5.dtsi. > Historically AM6xx devices have had CPUs in separte file as there are OPNs with different number of CPU cores Hence, how about k3-am62p5.dtsi => k3-am62p.dtsi + k3-am62p-j722s-common-{main,mcu,wakeup}.dtsi + k3-am62p-main.dtsi (USB2 and other deltas specific to AM62P) and since J722s has no variants with less than 4 cores (and along the lines of rest of J7xx devices): k3-j722s.dtsi => k3-am62p-j722s-common-{main,mcu,wakeup}.dtsi + k3-j722s-main.dtsi (USB3, C7x and other deltas specific to J722s; -- Regards Vignesh