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Date: Tue, 11 Jun 2024 12:39:44 +0200
From: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <u.kleine-koenig@baylibre.com>
To: Tzung-Bi Shih <tzungbi@kernel.org>
Cc: Benson Leung <bleung@chromium.org>, 
	Guenter Roeck <groeck@chromium.org>, linux-pwm@vger.kernel.org, chrome-platform@lists.linux.dev, 
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] pwm: cros-ec: Don't care about consumers in
 .get_state()
Message-ID: <dbygoq4rzxnzforpdsvuy5jze2rxqszi6qxtx6q37yxwjo36o6@qfoc6iz2nbay>
References: <20240607084416.897777-5-u.kleine-koenig@baylibre.com>
 <20240607084416.897777-6-u.kleine-koenig@baylibre.com>
 <ZmgP5NTPEGM0M2Li@google.com>
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Hello Tzung,

On Tue, Jun 11, 2024 at 08:50:44AM +0000, Tzung-Bi Shih wrote:
> On Fri, Jun 07, 2024 at 10:44:15AM +0200, Uwe Kleine-K=F6nig wrote:
> > The get_state() callback is never called (in a visible way) after there
> > is a consumer for a pwm device. The core handles loosing the information
> > about duty_cycle just fine.
>=20
> ChromeOS EC has no separated "enabled" state, it sees `duty =3D=3D 0` as
> "disabled"[1].  1db37f9561b2 ("pwm: cros-ec: Cache duty cycle value")
> caches the value in kernel side so that it can retrieve the original duty
> value even if (struct pwm_state *)->enabled is false.

There is no need to cache, so the following would work:

diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c
index 606ccfdaf4cc..2b72468767f4 100644
--- a/drivers/pwm/pwm-cros-ec.c
+++ b/drivers/pwm/pwm-cros-ec.c
@@ -25,15 +25,6 @@
 struct cros_ec_pwm_device {
 	struct cros_ec_device *ec;
 	bool use_pwm_type;
-	struct cros_ec_pwm *channel;
-};
-
-/**
- * struct cros_ec_pwm - per-PWM driver data
- * @duty_cycle: cached duty cycle
- */
-struct cros_ec_pwm {
-	u16 duty_cycle;
 };
=20
 static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chi=
p *chip)
@@ -135,37 +126,33 @@ static int cros_ec_pwm_apply(struct pwm_chip *chip, s=
truct pwm_device *pwm,
 			     const struct pwm_state *state)
 {
 	struct cros_ec_pwm_device *ec_pwm =3D pwm_to_cros_ec_pwm(chip);
-	struct cros_ec_pwm *channel =3D &ec_pwm->channel[pwm->hwpwm];
 	u16 duty_cycle;
-	int ret;
=20
-	/* The EC won't let us change the period */
-	if (state->period !=3D EC_PWM_MAX_DUTY)
-		return -EINVAL;
+	if (state->enabled) {
=20
-	if (state->polarity !=3D PWM_POLARITY_NORMAL)
-		return -EINVAL;
+		/* The EC only supports period =3D EC_PWM_MAX_DUTY */
+		if (state->period < EC_PWM_MAX_DUTY ||
+		    state->polarity !=3D PWM_POLARITY_NORMAL)
+			return -EINVAL;
=20
-	/*
-	 * EC doesn't separate the concept of duty cycle and enabled, but
-	 * kernel does. Translate.
-	 */
-	duty_cycle =3D state->enabled ? state->duty_cycle : 0;
+		duty_cycle =3D min(state->duty_cycle, (u64)EC_PWM_MAX_DUTY);
=20
-	ret =3D cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle);
-	if (ret < 0)
-		return ret;
+	} else {
+		/*
+		 * The hardware has no possibility to disable and so save power.
+		 * Many consumers expect the PWM to at least stop to oscilate, so just
+		 * configure for duty_cycle =3D 0.
+		 */
+		duty_cycle =3D 0;
+	}
=20
-	channel->duty_cycle =3D state->duty_cycle;
-
-	return 0;
+	return cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle);
 }
=20
 static int cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device =
*pwm,
 				 struct pwm_state *state)
 {
 	struct cros_ec_pwm_device *ec_pwm =3D pwm_to_cros_ec_pwm(chip);
-	struct cros_ec_pwm *channel =3D &ec_pwm->channel[pwm->hwpwm];
 	int ret;
=20
 	ret =3D cros_ec_pwm_get_duty(ec_pwm->ec, ec_pwm->use_pwm_type, pwm->hwpwm=
);
@@ -175,23 +162,10 @@ static int cros_ec_pwm_get_state(struct pwm_chip *chi=
p, struct pwm_device *pwm,
 	}
=20
 	state->enabled =3D (ret > 0);
+	state->duty_cycle =3D ret;
 	state->period =3D EC_PWM_MAX_DUTY;
 	state->polarity =3D PWM_POLARITY_NORMAL;
=20
-	/*
-	 * Note that "disabled" and "duty cycle =3D=3D 0" are treated the same. If
-	 * the cached duty cycle is not zero, used the cached duty cycle. This
-	 * ensures that the configured duty cycle is kept across a disable and
-	 * enable operation and avoids potentially confusing consumers.
-	 *
-	 * For the case of the initial hardware readout, channel->duty_cycle
-	 * will be 0 and the actual duty cycle read from the EC is used.
-	 */
-	if (ret =3D=3D 0 && channel->duty_cycle > 0)
-		state->duty_cycle =3D channel->duty_cycle;
-	else
-		state->duty_cycle =3D ret;
-
 	return 0;
 }
=20
@@ -291,11 +265,6 @@ static int cros_ec_pwm_probe(struct platform_device *p=
dev)
 	chip->ops =3D &cros_ec_pwm_ops;
 	chip->of_xlate =3D cros_ec_pwm_xlate;
=20
-	ec_pwm->channel =3D devm_kcalloc(dev, chip->npwm, sizeof(*ec_pwm->channel=
),
-					GFP_KERNEL);
-	if (!ec_pwm->channel)
-		return -ENOMEM;
-
 	dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
=20
 	ret =3D devm_pwmchip_add(dev, chip);

> To make sure I understand, did you mean the original duty value could be =
less
> important because:
> - We are less caring as it is in a debug context at [2]?
> - At [3], the PWM device is still initializing.

It doesn't really matter that this is about debug or initialisation. The
key here is that the core can handle the PWM using duty_cycle 0 (or
anything else) when it was requested to be disabled.

Best regards
Uwe

> [1]: https://crrev.com/0e16954460a08133b2557150e0897014ea2b9672/common/pw=
m.c#66
> [2]: https://elixir.bootlin.com/linux/v6.10-rc3/source/drivers/pwm/core.c=
#L52
> [3]: https://elixir.bootlin.com/linux/v6.10-rc3/source/drivers/pwm/core.c=
#L371

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