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Date: Tue, 11 Jun 2024 16:12:18 +0200
From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Martin Schiller <ms@dev.tdt.de>
Cc: hauke@hauke-m.de, dmitry.torokhov@gmail.com, rdunlap@infradead.org,
	robh@kernel.org, bhelgaas@google.com, linux-mips@vger.kernel.org,
	linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH] MIPS: pci: lantiq: restore reset gpio polarity
Message-ID: <ZmhbQgXxyhZ7shBh@alpha.franken.de>
References: <20240607090400.1816612-1-ms@dev.tdt.de>
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In-Reply-To: <20240607090400.1816612-1-ms@dev.tdt.de>

On Fri, Jun 07, 2024 at 11:04:00AM +0200, Martin Schiller wrote:
> Commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") not
> only switched to the gpiod API, but also inverted / changed the polarity
> of the GPIO.
> 
> According to the PCI specification, the RST# pin is an active-low
> signal. However, most of the device trees that have been widely used for
> a long time (mainly in the openWrt project) define this GPIO as
> active-high and the old driver code inverted the signal internally.
> 
> Apparently there are actually boards where the reset gpio must be
> operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH
> flag for initialization. Instead, we must explicitly set the gpio to
> value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that
> may have been set.
> 
> In order to remain compatible with all these existing device trees, we
> should therefore keep the logic as it was before the commit.
> 
> Fixes: 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API")
> Cc: stable@vger.kernel.org
> Signed-off-by: Martin Schiller <ms@dev.tdt.de>
> ---
>  arch/mips/pci/pci-lantiq.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

applied to mips-fixes

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]