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Tue, 11 Jun 2024 18:20:11 +0200 (CEST) Received: from localhost (10.48.86.111) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 11 Jun 2024 18:20:11 +0200 From: Valentin Caron To: Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue CC: , , , , , Valentin Caron Subject: [PATCH 0/2] rtc: stm32: introduce new st,stm32mp25-rtc compatible Date: Tue, 11 Jun 2024 18:19:56 +0200 Message-ID: <20240611161958.469209-1-valentin.caron@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-11_09,2024-06-11_01,2024-05-17_01 Introduce new st,stm32mp25-rtc compatible. It is based on st,stm32mp1-rtc. Difference is that stm32mp25 SoC implements a triple protection on RTC registers: - Secure bit based protection - Privileged context based protection - Compartment ID filtering based protection This driver will now check theses configurations before probing to avoid exceptions and fake reads on register. Link: https://www.st.com/resource/en/reference_manual/rm0457-stm32mp25xx-advanced-armbased-3264bit-mpus-stmicroelectronics.pdf#page=4081 Valentin Caron (2): dt-bindings: rtc: stm32: introduce new st,stm32mp25-rtc compatible rtc: stm32: add new st,stm32mp25-rtc compatible and check RIF configuration .../devicetree/bindings/rtc/st,stm32-rtc.yaml | 5 +- drivers/rtc/rtc-stm32.c | 78 +++++++++++++++++++ 2 files changed, 82 insertions(+), 1 deletion(-) -- 2.25.1