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Miller" References: <20240610231022.2460953-1-sean.anderson@linux.dev> <20240610231022.2460953-4-sean.anderson@linux.dev> <7c06c9d7-ad11-4acd-8c80-fbeb902da40d@lunn.ch> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 6/10/24 20:29, Andrew Lunn wrote: > On Tue, Jun 11, 2024 at 02:13:40AM +0200, Andrew Lunn wrote: >> On Mon, Jun 10, 2024 at 07:10:22PM -0400, Sean Anderson wrote: >> > Add support for reading the statistics counters, if they are enabled. >> > The counters may be 64-bit, but we can't detect this as there's no >> > ability bit for it and the counters are read-only. Therefore, we assume >> > the counters are 32-bits. >> >> > +static void axienet_stats_update(struct axienet_local *lp) >> > +{ >> > + enum temac_stat stat; >> > + >> > + lockdep_assert_held(&lp->stats_lock); >> > + >> > + u64_stats_update_begin(&lp->hw_stat_sync); >> > + for (stat = 0; stat < STAT_COUNT; stat++) { >> > + u32 counter = axienet_ior(lp, XAE_STATS_OFFSET + stat * 8); >> >> The * 8 here suggests the counters are spaced so that they could be 64 >> bit wide, even when only 32 bits are used. Does the documentation say >> anything about the upper 32 bits when the counters are only 32 bits? >> Are they guaranteed to read as zero? I'm just wondering if the code >> should be forward looking and read all 64 bits? > > Actually, if you read the upper 32 bits and they are not 0, you know > you have 64 bit counters. You can then kill off your period task, it > is not needed because your software counters will wrap around the same > time as the hardware counters. Yes, but then our stats remain stale forever, because we don't refresh stats before reading them as detailed in my other response. --Sean