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Tue, 11 Jun 2024 18:16:22 GMT Received: from [10.71.108.229] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 11 Jun 2024 11:16:21 -0700 Message-ID: Date: Tue, 11 Jun 2024 11:16:21 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/14] drm/msm/hdmi: simplify extp clock handling Content-Language: en-US To: Dmitry Baryshkov , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , "David Airlie" , Daniel Vetter CC: , , , References: <20240522-fd-hdmi-hpd-v2-0-c30bdb7c5c7e@linaro.org> <20240522-fd-hdmi-hpd-v2-2-c30bdb7c5c7e@linaro.org> From: Jessica Zhang In-Reply-To: <20240522-fd-hdmi-hpd-v2-2-c30bdb7c5c7e@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9xqB2I9mCLOH9MISd2RycTWFwYxorwld X-Proofpoint-ORIG-GUID: 9xqB2I9mCLOH9MISd2RycTWFwYxorwld X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-11_09,2024-06-11_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 suspectscore=0 adultscore=0 spamscore=0 phishscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406110125 On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote: > With the extp being the only "power" clock left, remove the surrounding > loops and handle the extp clock directly. > > Signed-off-by: Dmitry Baryshkov Reviewed-by: Jessica Zhang > --- > drivers/gpu/drm/msm/hdmi/hdmi.c | 24 ++++-------------------- > drivers/gpu/drm/msm/hdmi/hdmi.h | 6 +----- > drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 33 +++++++++++++-------------------- > 3 files changed, 18 insertions(+), 45 deletions(-) > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c > index 108c86925780..681265e29aa0 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c > @@ -235,13 +235,11 @@ static const struct hdmi_platform_config hdmi_tx_8960_config = { > }; > > static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"}; > -static const char *pwr_clk_names_8x74[] = {"extp"}; > static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"}; > static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0, 0}; > > static const struct hdmi_platform_config hdmi_tx_8974_config = { > HDMI_CFG(pwr_reg, 8x74), > - HDMI_CFG(pwr_clk, 8x74), > HDMI_CFG(hpd_clk, 8x74), > .hpd_freq = hpd_clk_freq_8x74, > }; > @@ -485,24 +483,10 @@ static int msm_hdmi_dev_probe(struct platform_device *pdev) > hdmi->hpd_clks[i] = clk; > } > > - hdmi->pwr_clks = devm_kcalloc(&pdev->dev, > - config->pwr_clk_cnt, > - sizeof(hdmi->pwr_clks[0]), > - GFP_KERNEL); > - if (!hdmi->pwr_clks) > - return -ENOMEM; > - > - for (i = 0; i < config->pwr_clk_cnt; i++) { > - struct clk *clk; > - > - clk = msm_clk_get(pdev, config->pwr_clk_names[i]); > - if (IS_ERR(clk)) > - return dev_err_probe(dev, PTR_ERR(clk), > - "failed to get pwr clk: %s\n", > - config->pwr_clk_names[i]); > - > - hdmi->pwr_clks[i] = clk; > - } > + hdmi->extp_clk = devm_clk_get_optional(&pdev->dev, "extp"); > + if (IS_ERR(hdmi->extp_clk)) > + return dev_err_probe(dev, PTR_ERR(hdmi->extp_clk), > + "failed to get extp clock\n"); > > hdmi->hpd_gpiod = devm_gpiod_get_optional(&pdev->dev, "hpd", GPIOD_IN); > /* This will catch e.g. -EPROBE_DEFER */ > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h > index 4586baf36415..abdbe4779cf9 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi.h > +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h > @@ -51,7 +51,7 @@ struct hdmi { > struct regulator_bulk_data *hpd_regs; > struct regulator_bulk_data *pwr_regs; > struct clk **hpd_clks; > - struct clk **pwr_clks; > + struct clk *extp_clk; > > struct gpio_desc *hpd_gpiod; > > @@ -98,10 +98,6 @@ struct hdmi_platform_config { > const char **hpd_clk_names; > const long unsigned *hpd_freq; > int hpd_clk_cnt; > - > - /* clks that need to be on for screen pwr (ie pixel clk): */ > - const char **pwr_clk_names; > - int pwr_clk_cnt; > }; > > struct hdmi_bridge { > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > index 4a5b5112227f..9eb4d06bdc0e 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > @@ -17,7 +17,7 @@ static void msm_hdmi_power_on(struct drm_bridge *bridge) > struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); > struct hdmi *hdmi = hdmi_bridge->hdmi; > const struct hdmi_platform_config *config = hdmi->config; > - int i, ret; > + int ret; > > pm_runtime_get_sync(&hdmi->pdev->dev); > > @@ -25,21 +25,15 @@ static void msm_hdmi_power_on(struct drm_bridge *bridge) > if (ret) > DRM_DEV_ERROR(dev->dev, "failed to enable pwr regulator: %d\n", ret); > > - if (config->pwr_clk_cnt > 0) { > + if (hdmi->extp_clk) { > DBG("pixclock: %lu", hdmi->pixclock); > - ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock); > - if (ret) { > - DRM_DEV_ERROR(dev->dev, "failed to set pixel clk: %s (%d)\n", > - config->pwr_clk_names[0], ret); > - } > - } > + ret = clk_set_rate(hdmi->extp_clk, hdmi->pixclock); > + if (ret) > + DRM_DEV_ERROR(dev->dev, "failed to set extp clk rate: %d\n", ret); > > - for (i = 0; i < config->pwr_clk_cnt; i++) { > - ret = clk_prepare_enable(hdmi->pwr_clks[i]); > - if (ret) { > - DRM_DEV_ERROR(dev->dev, "failed to enable pwr clk: %s (%d)\n", > - config->pwr_clk_names[i], ret); > - } > + ret = clk_prepare_enable(hdmi->extp_clk); > + if (ret) > + DRM_DEV_ERROR(dev->dev, "failed to enable extp clk: %d\n", ret); > } > } > > @@ -49,15 +43,15 @@ static void power_off(struct drm_bridge *bridge) > struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); > struct hdmi *hdmi = hdmi_bridge->hdmi; > const struct hdmi_platform_config *config = hdmi->config; > - int i, ret; > + int ret; > > /* TODO do we need to wait for final vblank somewhere before > * cutting the clocks? > */ > mdelay(16 + 4); > > - for (i = 0; i < config->pwr_clk_cnt; i++) > - clk_disable_unprepare(hdmi->pwr_clks[i]); > + if (hdmi->extp_clk) > + clk_disable_unprepare(hdmi->extp_clk); > > ret = regulator_bulk_disable(config->pwr_reg_cnt, hdmi->pwr_regs); > if (ret) > @@ -271,7 +265,6 @@ static enum drm_mode_status msm_hdmi_bridge_mode_valid(struct drm_bridge *bridge > { > struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); > struct hdmi *hdmi = hdmi_bridge->hdmi; > - const struct hdmi_platform_config *config = hdmi->config; > struct msm_drm_private *priv = bridge->dev->dev_private; > struct msm_kms *kms = priv->kms; > long actual, requested; > @@ -285,8 +278,8 @@ static enum drm_mode_status msm_hdmi_bridge_mode_valid(struct drm_bridge *bridge > if (kms->funcs->round_pixclk) > actual = kms->funcs->round_pixclk(kms, > requested, hdmi_bridge->hdmi->encoder); > - else if (config->pwr_clk_cnt > 0) > - actual = clk_round_rate(hdmi->pwr_clks[0], requested); > + else if (hdmi->extp_clk) > + actual = clk_round_rate(hdmi->extp_clk, requested); > else > actual = requested; > > > -- > 2.39.2 >