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AJvYcCVRqcsSGi+nFTXhlCWBnyUaTp/is1hXaHd9ieXFDwIv/+rVBtGFzMtE9NgxRMPoXgo3SvPlayS71bkhqeeiYGhNbLnSCBy2lB7Rdvea X-Gm-Message-State: AOJu0YwzKXWuAGXc2tnEydiZAtxCa8Yg07rp7a/Z7JPfDVLenhbhfHMu NQcPLJ6xvwoFbyMezPBJ/Q3FJI0hZXjMWb/vnv/Vje19265D3r+hexdNDH0oYokCOG6+uxYwSDG dJf2ouNhXjoFCWLeTEG7HDOSnzZyJGrq7PXnG X-Received: by 2002:a05:6870:968f:b0:250:3c9d:fd20 with SMTP id 586e51a60fabf-255131599d8mr147040fac.0.1718144223109; Tue, 11 Jun 2024 15:17:03 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240606224035.3238985-5-aruna.ramakrishna@oracle.com> <20240610214446.3380115-1-jeffxu@chromium.org> In-Reply-To: From: Jeff Xu Date: Tue, 11 Jun 2024 15:16:51 -0700 Message-ID: Subject: Re: Re [PATCH v5 4/5] x86/pkeys: Restore altstack before sigcontext To: Aruna Ramakrishna Cc: "dave.hansen@linux.intel.com" , Keith Lucas , "linux-kernel@vger.kernel.org" , Ingo Molnar , Thomas Gleixner , "x86@kernel.org" , Andrew Brownsword , Matthias Neugschwandtner , "jeffxu@google.com" , "jannh@google.com" , "keescook@chromium.org" , "sroettger@google.com" , "jorgelo@chromium.org" , "rick.p.edgecombe@intel.com" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jun 11, 2024 at 7:08=E2=80=AFAM Aruna Ramakrishna wrote: > > > > > On Jun 10, 2024, at 2:44=E2=80=AFPM, jeffxu@chromium.org wrote: > > > > Can we we move this patch to the first of the series? this can be an > > independent patch, the problem not only affect PKRU, but also other > > scenarios, as Rick pointed out in [1] > > > > [1] https://lore.kernel.org/lkml/d0162c76c25bc8e1c876aebe8e243ff2e68623= 59.camel@intel.com/ > > > > -Jeff > > For this patch set, the issue with rt_sigreturn() is only exposed after p= atch 3/5 - i.e., when > copy_fpregs_to_sigframe() calls update_pkru_in_sigframe() to update the P= KRU value to > user-specified PKRU that might disable pkey 0 access, thus breaking resto= re_altstack(). > So it seemed logical to me to have this fix as patch 4/5 of this series. = I=E2=80=99m not strongly > opposed to moving this to patch 1/5, but this ordering is easier to under= stand (I think). > But if this patch needs to be broken out of this patchset and submitted i= ndependently > (for the other scenarios you mentioned) - I can do that. > My main thought is that Rick mentioned this can be a cross-arch changes [1= ] and we can start with x86/64 and other arches might follow. [1] https://lore.kernel.org/lkml/20231107182251.91276-1-rick.p.edgecombe@in= tel.com/ Thanks -Jeff > Thanks, > Aruna