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AJvYcCVjYgS5EpFCV7CfmrsxGSBeIvQHOMBB/jZelioVUYZFhSQNWFBml0hgvQI914C2nTf2xbkahleaVorhMI7NMFfz8+TFUTH9LIMK7By4 X-Gm-Message-State: AOJu0YwvQQqdWqXoHVsIsVUsJFbh+p0xkzADdONrQVe9agP2SAKfdXg5 M2NXlOi6tZRN1VFD7nsmvwkgNkMzx0Z/BNSO1hry93cOOhBlWktiG8POrmPRmbOXp+2za3wh4js FNQ== X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:890b:b0:705:bd14:61b5 with SMTP id d2e1a72fcca58-705bd146371mr1756b3a.2.1718155339378; Tue, 11 Jun 2024 18:22:19 -0700 (PDT) Date: Tue, 11 Jun 2024 18:18:42 -0700 In-Reply-To: <20240608000819.3296176-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240608000819.3296176-1-seanjc@google.com> X-Mailer: git-send-email 2.45.2.505.gda0bf45e8d-goog Message-ID: <171815511021.423253.6283731694914331846.b4-ty@google.com> Subject: Re: [PATCH] KVM: x86/pmu: Add a helper to enable bits in FIXED_CTR_CTRL From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Dapeng Mi Content-Type: text/plain; charset="utf-8" On Fri, 07 Jun 2024 17:08:19 -0700, Sean Christopherson wrote: > Add a helper, intel_pmu_enable_fixed_counter_bits(), to dedup code that > enables fixed counter bits, i.e. when KVM clears bits in the reserved mask > used to detect invalid MSR_CORE_PERF_FIXED_CTR_CTRL values. > > No functional change intended. > > > [...] Applied to kvm-x86 pmu, thanks! [1/1] KVM: x86/pmu: Add a helper to enable bits in FIXED_CTR_CTRL https://github.com/kvm-x86/linux/commit/3b65a692a5c7 -- https://github.com/kvm-x86/linux/tree/next