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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Nishanth Menon , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jan Kiszka , Jacob Keller , Simon Horman CC: , , , References: <20240607-iep-v3-0-4824224105bc@siemens.com> <20240607-iep-v3-4-4824224105bc@siemens.com> From: Vignesh Raghavendra Content-Language: en-US In-Reply-To: <20240607-iep-v3-4-4824224105bc@siemens.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 07/06/24 18:32, Diogo Ivo wrote: > Add the interrupts needed for PTP Hardware Clock support via IEP > in SR1.0 devices. > > Reviewed-by: Jacob Keller > Signed-off-by: Diogo Ivo > --- > arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi > index ef7897763ef8..0a29ed172215 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi > @@ -73,3 +73,15 @@ &icssg0_eth { > "rx0", "rx1", > "rxmgm0", "rxmgm1"; > }; > + > +&icssg0_iep0 { > + interrupt-parent = <&icssg0_intc>; > + interrupts = <7 7 7>; > + interrupt-names = "iep_cap_cmp"; I dont see these documented in the binding: Documentation/devicetree/bindings/net/ti,icss-iep.yaml > +}; > + > +&icssg0_iep1 { > + interrupt-parent = <&icssg0_intc>; > + interrupts = <56 8 8>; > + interrupt-names = "iep_cap_cmp"; > +}; > -- Regards Vignesh