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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH v2 0/7] MIPS: clocksource cumulative enhancements
Date: Wed, 12 Jun 2024 09:54:27 +0100
Message-Id: <20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com>
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To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>, 
 Serge Semin <fancer.lancer@gmail.com>, 
 Daniel Lezcano <daniel.lezcano@linaro.org>, 
 Thomas Gleixner <tglx@linutronix.de>
Cc: "Maciej W. Rozycki" <macro@orcam.me.uk>, linux-mips@vger.kernel.org, 
 linux-kernel@vger.kernel.org, Jiaxun Yang <jiaxun.yang@flygoat.com>, 
 =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>

Hi all,

This series combined many enhancements for MIPS clocksource subsystems,
It improved r4k count synchronisation process, clock source rating for
selection, sched_clock eligibility and so on.

It seems fixed random RCU stall issue on Loongson 3A4000 multi-node
system and some boot failures on QEMU.

Please review.

Thanks 

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
Changes in v2:
- Fix number of zeros in rating computation (Maciej)
- Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej)
- Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com

---
Jiaxun Yang (7):
      MIPS: csrc-r4k: Refine rating computation
      MIPS: csrc-r4k: Apply verification clocksource flags
      MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
      MIPS: csrc-r4k: Don't register as sched_clock if unfit
      MIPS: sync-r4k: Rework based on x86 tsc_sync
      clocksource: mips-gic-timer: Refine rating computation
      clocksource: mips-gic-timer: Correct sched_clock width

 arch/mips/Kconfig                    |   1 +
 arch/mips/include/asm/r4k-timer.h    |   5 -
 arch/mips/kernel/csrc-r4k.c          |  24 ++-
 arch/mips/kernel/smp.c               |   2 -
 arch/mips/kernel/sync-r4k.c          | 281 +++++++++++++++++++++++++----------
 drivers/clocksource/mips-gic-timer.c |  20 ++-
 6 files changed, 234 insertions(+), 99 deletions(-)
---
base-commit: 704ba27ac55579704ba1289392448b0c66b56258
change-id: 20240509-mips-clks-9001264fcfbe

Best regards,
-- 
Jiaxun Yang <jiaxun.yang@flygoat.com>