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References: <20240507-samsung-usb-phy-fixes-v1-0-4ccba5afa7cc@linaro.org> <20240507-samsung-usb-phy-fixes-v1-5-4ccba5afa7cc@linaro.org>
In-Reply-To: <20240507-samsung-usb-phy-fixes-v1-5-4ccba5afa7cc@linaro.org>
From: Peter Griffin <peter.griffin@linaro.org>
Date: Wed, 12 Jun 2024 10:37:52 +0100
Message-ID: <CADrjBPqvdBsLVNeXVtqWp=hGS0G_=0jYQ_91pyg6jvFPN+2CvQ@mail.gmail.com>
Subject: Re: [PATCH 5/5] phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init()
To: =?UTF-8?Q?Andr=C3=A9_Draszik?= <andre.draszik@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, 
	Krzysztof Kozlowski <krzk@kernel.org>, Alim Akhtar <alim.akhtar@samsung.com>, 
	Sam Protsenko <semen.protsenko@linaro.org>, Tudor Ambarus <tudor.ambarus@linaro.org>, 
	Will McVicker <willmcvicker@google.com>, kernel-team@android.com, 
	linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, 
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, 
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Hi Andr=C3=A9,

On Tue, 7 May 2024 at 15:14, Andr=C3=A9 Draszik <andre.draszik@linaro.org> =
wrote:
>
> While commit 255ec3879dd4 ("phy: exynos5-usbdrd: Add 26MHz ref clk
> support") correctly states that CLKRSTCTRL[7:5] doesn't need to be set
> on modern Exynos platforms, SSPPLLCTL[2:0] should be programmed with
> the frequency of the reference clock for the USB2.0 phy instead.
>
> I stumbled across this while adding support for the Google Tensor
> gs101, but this should apply to E850 just the same.
>
> Do so.
>
> Fixes: 691525074db9 ("phy: exynos5-usbdrd: Add Exynos850 support")
> Signed-off-by: Andr=C3=A9 Draszik <andre.draszik@linaro.org>
>
> ---
> Feel free to drop the Fixes: if you think that is unwarranted here.
>
> v2: add missing bitfield.h include (seems this is implied on some
>     platforms, but not on others)
> ---

Reviewed-by:  Peter Griffin <peter.griffin@linaro.org>

regards,

Peter

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