Received-SPF: pass (google.com: domain of linux-kernel+bounces-211436-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1;
Message-ID: <b9c974265111887e7a944cb9e854e86cc8bcd47c.camel@gmail.com>
Subject: Re: [PATCH v3 2/2] iio: frequency: adf4350: add clk provider
From: Nuno =?ISO-8859-1?Q?S=E1?= <noname.nuno@gmail.com>
To: Antoniu Miclaus <antoniu.miclaus@analog.com>, Lars-Peter Clausen
	 <lars@metafoo.de>, Michael Hennerich <Michael.Hennerich@analog.com>, 
 Jonathan Cameron
	 <jic23@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski
	 <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, 
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org
Date: Wed, 12 Jun 2024 13:54:07 +0200
In-Reply-To: <20240612104554.66851-2-antoniu.miclaus@analog.com>
References: <20240612104554.66851-1-antoniu.miclaus@analog.com>
	 <20240612104554.66851-2-antoniu.miclaus@analog.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
User-Agent: Evolution 3.52.2 
Precedence: bulk
MIME-Version: 1.0

Hi Antonium

On Wed, 2024-06-12 at 13:45 +0300, Antoniu Miclaus wrote:
> Add clk provider feature for the adf4350.
>=20
> Even though the driver was sent as an IIO driver in most cases the
> device is actually seen as a clock provider.
>=20
> This patch aims to cover actual usecases requested by users in order to
> completely control the output frequencies from userspace.
>=20
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> changes in v3:
> =C2=A0- use container_of to directly access the adf4350_state structure.
> =C2=A0drivers/iio/frequency/adf4350.c | 118 +++++++++++++++++++++++++++++=
+++
> =C2=A01 file changed, 118 insertions(+)
>=20
> diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4=
350.c
> index 4abf80f75ef5..f716f744baa9 100644
> --- a/drivers/iio/frequency/adf4350.c
> +++ b/drivers/iio/frequency/adf4350.c
> @@ -19,6 +19,7 @@
> =C2=A0#include <linux/gpio/consumer.h>
> =C2=A0#include <asm/div64.h>
> =C2=A0#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> =C2=A0
> =C2=A0#include <linux/iio/iio.h>
> =C2=A0#include <linux/iio/sysfs.h>
> @@ -36,6 +37,9 @@ struct adf4350_state {
> =C2=A0	struct gpio_desc		*lock_detect_gpiod;
> =C2=A0	struct adf4350_platform_data	*pdata;
> =C2=A0	struct clk			*clk;
> +	struct clk			*clkout;
> +	const char			*clk_out_name;
> +	struct clk_hw			hw;
> =C2=A0	unsigned long			clkin;
> =C2=A0	unsigned long			chspc; /* Channel Spacing */
> =C2=A0	unsigned long			fpfd; /* Phase Frequency Detector */
> @@ -61,6 +65,8 @@ struct adf4350_state {
> =C2=A0	__be32				val __aligned(IIO_DMA_MINALIGN);
> =C2=A0};
> =C2=A0
> +#define to_state(_hw) container_of(_hw, struct adf4350_state, hw)
> +

nit: to_adf4350_state() would be neater...

> =C2=A0static struct adf4350_platform_data default_pdata =3D {
> =C2=A0	.channel_spacing =3D 10000,
> =C2=A0	.r2_user_settings =3D ADF4350_REG2_PD_POLARITY_POS |
> @@ -264,6 +270,10 @@ static ssize_t adf4350_write(struct iio_dev *indio_d=
ev,
> =C2=A0	mutex_lock(&st->lock);
> =C2=A0	switch ((u32)private) {
> =C2=A0	case ADF4350_FREQ:
> +		if (st->clkout) {
> +			ret =3D clk_set_rate(st->clkout, readin);
> +			break;
> +		}

So, apparently you forgot or decided otherwise to not go with the suggestio=
n of
not including the IIO interface (at least he channel one - debugfs could be
maintained I guess) or with the more in the middle approach Michael suggest=
ed.
Just not allowing ADF4350_FREQ and ADF4350_FREQ_REFIN.

Hence, I would expect at least some justification to keep the above in your=
 v3
changelog. Also note that keeping ADF4350_FREQ_REFIN while being a clock
provider seems pointless and maybe even be wrong (as the clock framework sh=
ould
take care of the parent clock). This also brings another question... see be=
low

...

>=20
> +static int adf4350_clk_register(struct adf4350_state *st)
> +{
> +	struct spi_device *spi =3D st->spi;
> +	struct clk_init_data init;
> +	struct clk *clk;
> +	const char *parent_name;
> +	int ret;
> +
> +	if (!device_property_present(&spi->dev, "#clock-cells"))
> +		return 0;
> +
> +	init.name =3D devm_kasprintf(&spi->dev, GFP_KERNEL, "%s-clk",
> +				=C2=A0=C2=A0 fwnode_get_name(dev_fwnode(&spi->dev)));
> +	device_property_read_string(&spi->dev, "clock-output-names",
> +				=C2=A0=C2=A0=C2=A0 &init.name);
> +
> +	parent_name =3D of_clk_get_parent_name(spi->dev.of_node, 0);
> +	if (!parent_name)
> +		return -EINVAL;
> +
> +	init.ops =3D &adf4350_clk_ops;
> +	init.parent_names =3D &parent_name;
> +	init.num_parents =3D 1;

Shouldn't we set CLK_SET_RATE_PARENT in init.flags?

- Nuno S=C3=A1