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From: joswang <joswang1221@gmail.com>
Date: Wed, 12 Jun 2024 22:28:06 +0800
Message-ID: <CAMtoTm1ojhCSRb4c+MPjuJB+JaeD2ex6B7FpCaJtLvrTj0Q8Cg@mail.gmail.com>
Subject: Re: [PATCH v2, 1/3] dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Thinh.Nguyen@synopsys.com, robh@kernel.org, krzk+dt@kernel.org, 
	conor+dt@kernel.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, 
	linux-kernel@vger.kernel.org, balbi@kernel.org, devicetree@vger.kernel.org, 
	joswang <joswang@lenovo.com>
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On Tue, Jun 4, 2024 at 2:33=E2=80=AFPM Krzysztof Kozlowski <krzk@kernel.org=
> wrote:
>
> On 03/06/2024 15:00, joswang wrote:
> > From: joswang <joswang@lenovo.com>
>
> Is this your full name or known identity you want to use for all kernel
> contributions? Looks like login...
>
> >
> > There is an issue with the DWC31 2.00a and earlier versions
> > where the controller link power state transition from
> > P3/P3CPM/P4 to P2 may take longer than expected, ultimately
> > resulting in the hibernation D3 entering time exceeding the
> > expected 10ms.
> >
> > Add a new 'snps,p2p3tranok-quirk' DT quirk to dwc3 core
> > for enable the controller transitions directly from phy
> > power state P2 to P3 or from state P3 to P2.
> >
> > Note that this can only be set if the USB3 PHY supports
> > direct p3 to p2 or p2 to p3 conversion.
> >
> > Signed-off-by: joswang <joswang@lenovo.com>
> > ---
> >  Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Doc=
umentation/devicetree/bindings/usb/snps,dwc3.yaml
> > index 1cd0ca90127d..721927495887 100644
> > --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > @@ -242,6 +242,13 @@ properties:
> >        When set, all HighSpeed bus instances in park mode are disabled.
> >      type: boolean
> >
> > +  snps,p2p3tranok-quirk:
>
> Why this cannot be deduced from compatible? Which upstream SoCs are
> affected?
>
>
>
> Best regards,
> Krzysztof
>

Thanks for your help in reviewing the code
DWC31_USB 2.00a and earlier versions IP bug, regardless of platform.