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Wed, 12 Jun 2024 10:13:21 -0500 Received: from lelvsmtp5.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45CFDKD4104005; Wed, 12 Jun 2024 10:13:21 -0500 From: Andrew Davis To: Daniel Tang , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , Andrew Davis Subject: [PATCH 2/2] ARM: dts: nspire: Add full compatible for watchdog node Date: Wed, 12 Jun 2024 10:13:14 -0500 Message-ID: <20240612151314.27967-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240612151314.27967-1-afd@ti.com> References: <20240612151314.27967-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 The watchdog appears to be an ARM SP805, add the full compatible and the needed clocks properties. Leave this disabled for now as functionality is not fully tested. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire/nspire.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nspire/nspire.dtsi b/arch/arm/boot/dts/nspire/nspire.dtsi index d56fef7250dbd..95588b716c6f3 100644 --- a/arch/arm/boot/dts/nspire/nspire.dtsi +++ b/arch/arm/boot/dts/nspire/nspire.dtsi @@ -170,9 +170,12 @@ timer1: timer@900d0000 { }; watchdog: watchdog@90060000 { - compatible = "arm,primecell"; + compatible = "arm,sp805", "arm,primecell"; reg = <0x90060000 0x1000>; interrupts = <3>; + clocks = <&apb_pclk>, <&apb_pclk>; + clock-names = "wdog_clk", "apb_pclk"; + status = "disabled"; }; rtc: rtc@90090000 { -- 2.39.2