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Date: Wed, 12 Jun 2024 18:19:41 +0200
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Guenter Roeck <linux@roeck-us.net>, 
	Heiner Kallweit <hkallweit1@gmail.com>
Cc: Armin Wolf <W_Armin@gmx.de>, linux-hwmon@vger.kernel.org, 
	linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, 
	Krzysztof Kozlowski <krzk+dt@kernel.org>, =?utf-8?B?UmVuw6k=?= Rebe <rene@exactcode.de>, 
	Thomas =?utf-8?Q?Wei=C3=9Fschuh?= <linux@weissschuh.net>, Stephen Horvath <s.horvath@outlook.com.au>
Subject: Re: [PATCH v4 5/6] i2c: smbus: Support DDR5 SPD EEPROMs
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Mail-Followup-To: Wolfram Sang <wsa+renesas@sang-engineering.com>, 
	Guenter Roeck <linux@roeck-us.net>, Heiner Kallweit <hkallweit1@gmail.com>, 
	Armin Wolf <W_Armin@gmx.de>, linux-hwmon@vger.kernel.org, linux-i2c@vger.kernel.org, 
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, 
	Krzysztof Kozlowski <krzk+dt@kernel.org>, =?utf-8?B?UmVuw6k=?= Rebe <rene@exactcode.de>, 
	Thomas =?utf-8?Q?Wei=C3=9Fschuh?= <linux@weissschuh.net>, Stephen Horvath <s.horvath@outlook.com.au>
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CCing Heiner...

> > > > Yes, maybe this could be simplified to "(LP)DDR memory types"
> > > >=20
> > >=20
> > > I rephrased it to "Only works for (LP)DDR memory types up to DDR5".
> >=20
> > Thanks!
> >=20
> > > How about "Only works on systems with 1 to 8 memory slots" ?
> >=20
> > This is a question for Heiner. I'd think it is is still correct, but I
> > don't know exactly.
> >=20
>=20
> My interpretation was that it should work if the DIMMs are connected to
> multiplexed I2C busses, but probably not if they are connected to
> different adapters. The error message in that case is a bit misleading,
> though, because it claims that "More than 8 memory slots on a single bus",
> which isn't necessarily the case. For example, it should be perfectly val=
id
> to have up to 24 DIMMs in this system.
>=20
> i2c-0/name:SMBus PIIX4 adapter port 0 at 0b00
> i2c-1/name:SMBus PIIX4 adapter port 2 at 0b00
> i2c-2/name:SMBus PIIX4 adapter port 1 at 0b20
>=20
> ... but I guess that is a question for someone with such a system to answ=
er.
>=20
> Ultimately the handling of systems with more than 8 memory slots will need
> to be updated at some point. On my systems, with 'i2c: piix4: Register SP=
Ds'
> applied, I see
>=20
> i2c i2c-0: 4/4 memory slots populated (from DMI)
>     [my system is running 6.6.y which still generates that message]
> i2c i2c-0: Successfully instantiated SPD at 0x50
> i2c i2c-0: Successfully instantiated SPD at 0x51
> i2c i2c-0: Successfully instantiated SPD at 0x52
> i2c i2c-0: Successfully instantiated SPD at 0x53
> i2c i2c-1: 4/4 memory slots populated (from DMI)
> i2c i2c-2: 4/4 memory slots populated (from DMI)
>=20
> meaning the function is called for each adapter (which makes sense).
> However, the code counting the DIMMs doesn't really take the adapter
> into account, meaning adapters 1 and 2 are still probed even though
> all DIMMs were already instantiated from adapter 0.
>=20
> On a system with more than 8 DIMMs connected to different piix4 adapters
> (without mux) we'd probably see something like
>=20
> i2c i2c-0: More than 8 memory slots on a single bus, contact i801 maintai=
ner ...
> i2c i2c-1: More than 8 memory slots on a single bus, contact i801 maintai=
ner ...
> i2c i2c-2: More than 8 memory slots on a single bus, contact i801 maintai=
ner ...
>=20
> which wouldn't be very helpful. I think the main problem may be that
> the i801 driver implements sub-adapters as muxes, but the piix4 driver
> doesn't do (or need) that. The message is also i801 centric which doesn't
> apply anymore after 'i2c: piix4: Register SPDs' is applied.
>=20
> However, I would not want to even try changing that code without access
> to a system using piix4 and supporting more than 8 memory slots.
>=20
> Thanks,
> Guenter
>=20
>=20

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