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Date: Wed, 12 Jun 2024 17:39:38 +0100
From: Conor Dooley <conor@kernel.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Burton <paulburton@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mips@vger.kernel.org
Subject: Re: [PATCH v2 7/8] du-bindings: mips: cpu: Add img,mips compatible
Message-ID: <20240612-unstuffed-figure-966c90af52bc@spud>
References: <20240612-boston-syscon-v2-0-9f8e1a07fa63@flygoat.com>
 <20240612-boston-syscon-v2-7-9f8e1a07fa63@flygoat.com>
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In-Reply-To: <20240612-boston-syscon-v2-7-9f8e1a07fa63@flygoat.com>


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On Wed, Jun 12, 2024 at 12:56:26PM +0100, Jiaxun Yang wrote:
> This compatible is used by boston.dts.
>=20
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> note: This is a wildcard compatible for all MIPS CPUs,
>       I think we should use something like "riscv" for riscv.

riscv systems, other than simulators etc are not meant to use the
"riscv" compatible. All of the real CPUs use "vendor,cpu", "riscv".
I'd suggest you add specific compatibles for your CPUs.

Thanks
Conor.

>       Should I add something like "mips" or "mips,cpu"?
> ---
>  Documentation/devicetree/bindings/mips/cpus.yaml | 1 +
>  1 file changed, 1 insertion(+)
>=20
> diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documenta=
tion/devicetree/bindings/mips/cpus.yaml
> index a85137add668..7f9513f2a540 100644
> --- a/Documentation/devicetree/bindings/mips/cpus.yaml
> +++ b/Documentation/devicetree/bindings/mips/cpus.yaml
> @@ -24,6 +24,7 @@ properties:
>        - brcm,bmips5000
>        - brcm,bmips5200
>        - img,i6500
> +      - img,mips
>        - ingenic,xburst-fpu1.0-mxu1.1
>        - ingenic,xburst-fpu2.0-mxu2.0
>        - ingenic,xburst-mxu1.0
>=20
> --=20
> 2.43.0
>=20

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