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12 Jun 2024 11:31:09 -0700 Received: from kbuild by 628d7d8b9fc6 with local (Exim 4.96) (envelope-from ) id 1sHSkU-0001os-1R; Wed, 12 Jun 2024 18:31:06 +0000 Date: Thu, 13 Jun 2024 02:30:57 +0800 From: kernel test robot To: Slark Xiao , manivannan.sadhasivam@linaro.org, loic.poulain@linaro.org, ryazanov.s.a@gmail.com, johannes@sipsolutions.net, quic_jhugo@quicinc.com Cc: oe-kbuild-all@lists.linux.dev, netdev@vger.kernel.org, mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Slark Xiao Subject: Re: [PATCH v2 1/2] bus: mhi: host: Import mux_id item Message-ID: <202406130220.gq15Sjzk-lkp@intel.com> References: <20240612093842.359805-1-slark_xiao@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240612093842.359805-1-slark_xiao@163.com> Hi Slark, kernel test robot noticed the following build warnings: [auto build test WARNING on mani-mhi/mhi-next] [also build test WARNING on linus/master v6.10-rc3 next-20240612] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Slark-Xiao/net-wwan-mhi-make-default-data-link-id-configurable/20240612-174242 base: https://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi.git mhi-next patch link: https://lore.kernel.org/r/20240612093842.359805-1-slark_xiao%40163.com patch subject: [PATCH v2 1/2] bus: mhi: host: Import mux_id item config: arm64-defconfig (https://download.01.org/0day-ci/archive/20240613/202406130220.gq15Sjzk-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240613/202406130220.gq15Sjzk-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202406130220.gq15Sjzk-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/bus/mhi/host/pci_generic.c:57: warning: Function parameter or struct member 'mux_id' not described in 'mhi_pci_dev_info' vim +57 drivers/bus/mhi/host/pci_generic.c 48f98496b1de132f drivers/bus/mhi/host/pci_generic.c Qiang Yu 2024-04-24 32 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 33 /** 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 34 * struct mhi_pci_dev_info - MHI PCI device specific information 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 35 * @config: MHI controller configuration 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 36 * @name: name of the PCI module 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 37 * @fw: firmware path (if any) 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 38 * @edl: emergency download mode firmware path (if any) 48f98496b1de132f drivers/bus/mhi/host/pci_generic.c Qiang Yu 2024-04-24 39 * @edl_trigger: capable of triggering EDL mode in the device (if supported) 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 40 * @bar_num: PCI base address register to use for MHI MMIO register space 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 41 * @dma_data_width: DMA transfer word size (32 or 64 bits) 5c2c85315948c42c drivers/bus/mhi/pci_generic.c Richard Laing 2021-07-15 42 * @mru_default: default MRU size for MBIM network packets 56f6f4c4eb2a710e drivers/bus/mhi/pci_generic.c Bhaumik Bhatt 2021-07-16 43 * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead 56f6f4c4eb2a710e drivers/bus/mhi/pci_generic.c Bhaumik Bhatt 2021-07-16 44 * of inband wake support (such as sdx24) 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 45 */ 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 46 struct mhi_pci_dev_info { 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 47 const struct mhi_controller_config *config; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 48 const char *name; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 49 const char *fw; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 50 const char *edl; 48f98496b1de132f drivers/bus/mhi/host/pci_generic.c Qiang Yu 2024-04-24 51 bool edl_trigger; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 52 unsigned int bar_num; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 53 unsigned int dma_data_width; 5c2c85315948c42c drivers/bus/mhi/pci_generic.c Richard Laing 2021-07-15 54 unsigned int mru_default; 56f6f4c4eb2a710e drivers/bus/mhi/pci_generic.c Bhaumik Bhatt 2021-07-16 55 bool sideband_wake; 2b153f167f41516b drivers/bus/mhi/host/pci_generic.c Slark Xiao 2024-06-12 56 unsigned int mux_id; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 @57 }; 855a70c12021bdc5 drivers/bus/mhi/pci_generic.c Loic Poulain 2020-10-21 58 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki