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[2001:14ba:a0c3:3a00::b8c]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52ca2825955sm162210e87.22.2024.06.13.03.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jun 2024 03:57:53 -0700 (PDT) Date: Thu, 13 Jun 2024 13:57:51 +0300 From: Dmitry Baryshkov To: Jayesh Choudhary Cc: linux-kernel@vger.kernel.org, sui.jingfeng@linux.dev, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, mripard@kernel.org, sam@ravnborg.org, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, a-bhatia1@ti.com, dri-devel@lists.freedesktop.org Subject: Re: [PATCH v5 3/3] drm/bridge: sii902x: Add pixel clock check in atomic_check Message-ID: References: <20240613083805.439337-1-j-choudhary@ti.com> <20240613083805.439337-4-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240613083805.439337-4-j-choudhary@ti.com> On Thu, Jun 13, 2024 at 02:08:05PM +0530, Jayesh Choudhary wrote: > Check the pixel clock for the mode in atomic_check and ensure that > it is within the range supported by the bridge. > > Signed-off-by: Jayesh Choudhary > --- > drivers/gpu/drm/bridge/sii902x.c | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry