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References: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com>
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Date: Fri, 14 Jun 2024 03:17:38 +0100
From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Huacai Chen" <chenhuacai@kernel.org>
Cc: "Xuerui Wang" <kernel@xen0n.name>, loongarch@lists.linux.dev,
 linux-kernel@vger.kernel.org,
 "stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH 1/2] LoongArch: Initialise unused Direct Map Windows
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=E5=9C=A82024=E5=B9=B46=E6=9C=8814=E6=97=A5=E5=85=AD=E6=9C=88 =E4=B8=8A=E5=
=8D=883:13=EF=BC=8CHuacai Chen=E5=86=99=E9=81=93=EF=BC=9A
> Hi, Jiaxun,
>
> On Fri, Jun 14, 2024 at 12:41=E2=80=AFAM Jiaxun Yang <jiaxun.yang@flyg=
oat.com> wrote:
>>
>> DMW 2 & 3 are unused by kernel, however firmware may leave
>> garbage in them and interfere kernel's address mapping.
>>
>> Clear them as necessary.
> I think the current status is as expected, we don't want kernel access
> to non-8000 and non-9000 addresses. And low-end chips may have only
> two DMWs.

I see, I'll remove U-Boot's dependency to DMW 2 and 3 then.

Thanks
- Jiaxun

>
> Huacai
>
>
> Huacai
>
>>
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>  arch/loongarch/include/asm/loongarch.h   |  4 ++++
>>  arch/loongarch/include/asm/stackframe.h  | 11 +++++++++++
>>  arch/loongarch/kernel/head.S             | 12 ++----------
>>  arch/loongarch/power/suspend_asm.S       |  6 +-----
>>  drivers/firmware/efi/libstub/loongarch.c |  2 ++
>>  5 files changed, 20 insertions(+), 15 deletions(-)
>>
>> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/=
include/asm/loongarch.h
>> index eb09adda54b7..3720096efcf9 100644
>> --- a/arch/loongarch/include/asm/loongarch.h
>> +++ b/arch/loongarch/include/asm/loongarch.h
>> @@ -889,6 +889,10 @@
>>  #define CSR_DMW1_BASE          (CSR_DMW1_VSEG << DMW_PABITS)
>>  #define CSR_DMW1_INIT          (CSR_DMW1_BASE | CSR_DMW1_MAT | CSR_D=
MW1_PLV0)
>>
>> +/* Direct Map window 2/3 - unused */
>> +#define CSR_DMW2_INIT          0
>> +#define CSR_DMW3_INIT          0
>> +
>>  /* Performance Counter registers */
>>  #define LOONGARCH_CSR_PERFCTRL0                0x200   /* 32 perf ev=
ent 0 config */
>>  #define LOONGARCH_CSR_PERFCNTR0                0x201   /* 64 perf ev=
ent 0 count value */
>> diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch=
/include/asm/stackframe.h
>> index d9eafd3ee3d1..10c5dcf56bc7 100644
>> --- a/arch/loongarch/include/asm/stackframe.h
>> +++ b/arch/loongarch/include/asm/stackframe.h
>> @@ -38,6 +38,17 @@
>>         cfi_restore \reg \offset \docfi
>>         .endm
>>
>> +       .macro SETUP_DMWS temp1
>> +       li.d    \temp1, CSR_DMW0_INIT
>> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN0
>> +       li.d    \temp1, CSR_DMW1_INIT
>> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN1
>> +       li.d    \temp1, CSR_DMW2_INIT
>> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN2
>> +       li.d    \temp1, CSR_DMW3_INIT
>> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN3
>> +       .endm
>> +
>>  /* Jump to the runtime virtual address. */
>>         .macro JUMP_VIRT_ADDR temp1 temp2
>>         li.d    \temp1, CACHE_BASE
>> diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/hea=
d.S
>> index 4677ea8fa8e9..1a71fc09bfd6 100644
>> --- a/arch/loongarch/kernel/head.S
>> +++ b/arch/loongarch/kernel/head.S
>> @@ -44,11 +44,7 @@ SYM_DATA(kernel_fsize, .long _kernel_fsize);
>>  SYM_CODE_START(kernel_entry)                   # kernel entry point
>>
>>         /* Config direct window and set PG */
>> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0, 0x8000 xx=
xx xxxx xxxx
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
>> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0, 0x9000 xx=
xx xxxx xxxx
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
>> -
>> +       SETUP_DMWS      t0
>>         JUMP_VIRT_ADDR  t0, t1
>>
>>         /* Enable PG */
>> @@ -124,11 +120,7 @@ SYM_CODE_END(kernel_entry)
>>   * function after setting up the stack and tp registers.
>>   */
>>  SYM_CODE_START(smpboot_entry)
>> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
>> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
>> -
>> +       SETUP_DMWS      t0
>>         JUMP_VIRT_ADDR  t0, t1
>>
>>  #ifdef CONFIG_PAGE_SIZE_4KB
>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/powe=
r/suspend_asm.S
>> index e2fc3b4e31f0..6fdd74eb219b 100644
>> --- a/arch/loongarch/power/suspend_asm.S
>> +++ b/arch/loongarch/power/suspend_asm.S
>> @@ -73,11 +73,7 @@ SYM_FUNC_START(loongarch_suspend_enter)
>>          * Reload all of the registers and return.
>>          */
>>  SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
>> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
>> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
>> -
>> +       SETUP_DMWS      t0
>>         JUMP_VIRT_ADDR  t0, t1
>>
>>         /* Enable PG */
>> diff --git a/drivers/firmware/efi/libstub/loongarch.c b/drivers/firmw=
are/efi/libstub/loongarch.c
>> index d0ef93551c44..3782d0a187d1 100644
>> --- a/drivers/firmware/efi/libstub/loongarch.c
>> +++ b/drivers/firmware/efi/libstub/loongarch.c
>> @@ -74,6 +74,8 @@ efi_status_t efi_boot_kernel(void *handle, efi_load=
ed_image_t *image,
>>         /* Config Direct Mapping */
>>         csr_write64(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0);
>>         csr_write64(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1);
>> +       csr_write64(CSR_DMW2_INIT, LOONGARCH_CSR_DMWIN2);
>> +       csr_write64(CSR_DMW3_INIT, LOONGARCH_CSR_DMWIN3);
>>
>>         real_kernel_entry =3D (void *)kernel_entry_address(kernel_add=
r, image);
>>
>>
>> --
>> 2.43.0
>>
>>

--=20
- Jiaxun