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References: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com>
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Date: Fri, 14 Jun 2024 03:24:47 +0100
From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Huacai Chen" <chenhuacai@kernel.org>,
 "Jianmin Lv" <lvjianmin@loongson.cn>
Cc: "Xuerui Wang" <kernel@xen0n.name>, loongarch@lists.linux.dev,
 linux-kernel@vger.kernel.org,
 "stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH 2/2] LoongArch: Fix ACPI standard register based S3 support
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=E5=9C=A82024=E5=B9=B46=E6=9C=8814=E6=97=A5=E5=85=AD=E6=9C=88 =E4=B8=8A=E5=
=8D=883:11=EF=BC=8CHuacai Chen=E5=86=99=E9=81=93=EF=BC=9A
> Hi, Jiaxun,
>
> On Fri, Jun 14, 2024 at 12:41=E2=80=AFAM Jiaxun Yang <jiaxun.yang@flyg=
oat.com> wrote:
>>
>> Most LoongArch 64 machines are using custom "SADR" ACPI extension
>> to perform ACPI S3 sleep. However the standard ACPI way to perform
>> sleep is to write a value to ACPI PM1/SLEEP_CTL register, and this
>> is never supported properly in kernel.
> Maybe our hardware is insane so we need "SADR", if so, this patch may
> break real hardware. What's your opinion, Jianmin?

I understand why your hardware need SADR. Most systems DDR self-refresh
mode needs to be setup by firmware.

There is no chance that it may break real hardware. When firmware suppli=
ed
SADR it will always use SADR. The fallback only happens when _S3 method =
exist
but no SADR supplied, which won't happen on real hardware.

For QEMU we don't have stub firmware but standard compliant SEEP_CTL is
sufficient for entering sleep mode, thus we need this fallback path.

Thanks

>
> Huacai
>
>>

--=20
- Jiaxun