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Thu, 13 Jun 2024 19:33:02 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCVuhTLAwSZElEH2cSN88GihfG0FA0qu8+3eF6F2HPxmSVdJQlfDxXQpTUmgP1jbIBj6m7okS1XYR7NaJucwib6CoPuzFHqXGfu4sIGJo6nLi+Ne5kwxYUEb6cKw7vpShjtObYvz X-Gm-Message-State: AOJu0YwXpYV2LEOTxis7MxsgjX0W/DwdrUHKb09J7Rtc6zkqLyraNpoK VF65YjpDwUTIKLYy7J1pGzjsqzTCrJyK6Uy/rRsJR1pJoeGXLVTc5memNgTSwM0y7V5GqtKG0ac tYl42aWhIQWvvpv1Qp2gQevgNJOU= X-Received: by 2002:a17:906:b15:b0:a6f:5a8a:debe with SMTP id a640c23a62f3a-a6f5a8adf73mr223091666b.22.1718332381631; Thu, 13 Jun 2024 19:33:01 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240613-loongarch64-sleep-v1-0-a245232af5e4@flygoat.com> <20240613-loongarch64-sleep-v1-2-a245232af5e4@flygoat.com> In-Reply-To: From: Huacai Chen Date: Fri, 14 Jun 2024 10:32:50 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/2] LoongArch: Fix ACPI standard register based S3 support To: Jiaxun Yang Cc: Jianmin Lv , Xuerui Wang , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, "stable@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Jun 14, 2024 at 10:25=E2=80=AFAM Jiaxun Yang wrote: > > > > =E5=9C=A82024=E5=B9=B46=E6=9C=8814=E6=97=A5=E5=85=AD=E6=9C=88 =E4=B8=8A= =E5=8D=883:11=EF=BC=8CHuacai Chen=E5=86=99=E9=81=93=EF=BC=9A > > Hi, Jiaxun, > > > > On Fri, Jun 14, 2024 at 12:41=E2=80=AFAM Jiaxun Yang wrote: > >> > >> Most LoongArch 64 machines are using custom "SADR" ACPI extension > >> to perform ACPI S3 sleep. However the standard ACPI way to perform > >> sleep is to write a value to ACPI PM1/SLEEP_CTL register, and this > >> is never supported properly in kernel. > > Maybe our hardware is insane so we need "SADR", if so, this patch may > > break real hardware. What's your opinion, Jianmin? > > I understand why your hardware need SADR. Most systems DDR self-refresh > mode needs to be setup by firmware. _S3 is also a firmware method, why we can't use it to setup self-refresh? Huacai > > There is no chance that it may break real hardware. When firmware supplie= d > SADR it will always use SADR. The fallback only happens when _S3 method e= xist > but no SADR supplied, which won't happen on real hardware. > > For QEMU we don't have stub firmware but standard compliant SEEP_CTL is > sufficient for entering sleep mode, thus we need this fallback path. > > Thanks > > > > > Huacai > > > >> > > -- > - Jiaxun >