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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8604.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2e90997a-5e33-4421-ee7b-08dc8c512fa4 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Jun 2024 09:05:49.8986 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BHwN3FG3VBxVP8Eafn94DYw2fc+ACivUKk8WVtbq/fL0Ex/lLOVanQ19kJMjsLzcHe7efDpmM+I1qIoG3zKlcQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB7171 > -----Original Message----- > From: Sascha Hauer > Sent: Friday, May 24, 2024 5:56 PM > To: Pankaj Gupta > Cc: Jonathan Corbet ; Rob Herring ; > Krzysztof Kozlowski ; Conor Dooley > ; Shawn Guo ; Pengutronix > Kernel Team ; Fabio Estevam > ; Rob Herring ; Krzysztof > Kozlowski ; linux-doc@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev; > linux-arm-kernel@lists.infradead.org > Subject: Re: [EXT] Re: [PATCH v2 4/5] firmware: imx: add driver for NXP > EdgeLock Enclave > > Caution: This is an external email. Please take care when clicking links = or > opening attachments. When in doubt, report the message using the 'Report > this email' button > > > On Fri, May 24, 2024 at 12:08:14PM +0000, Pankaj Gupta wrote: > > > > > > > -----Original Message----- > > > From: Sascha Hauer > > > Sent: Friday, May 24, 2024 4:04 PM > > > To: Pankaj Gupta > > > Cc: Jonathan Corbet ; Rob Herring > > > ; Krzysztof Kozlowski > > > ; Conor Dooley > > > ; Shawn Guo ; > Pengutronix > > > Kernel Team ; Fabio Estevam > > > ; Rob Herring ; Krzysztof > > > Kozlowski ; linux-doc@vger.kernel.org; linux- > > > kernel@vger.kernel.org; devicetree@vger.kernel.org; > > > imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org > > > Subject: [EXT] Re: [PATCH v2 4/5] firmware: imx: add driver for NXP > > > EdgeLock Enclave > > > > > > Caution: This is an external email. Please take care when clicking > > > links or opening attachments. When in doubt, report the message > > > using the 'Report this email' button > > > > > > > > > On Thu, May 23, 2024 at 04:19:35PM +0530, Pankaj Gupta wrote: > > > > NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), > > > > are embedded in the SoC to support the features like HSM, SHE & > > > > V2X, using message based communication interface. > > > > > > > > The secure enclave FW communicates on a dedicated messaging > > > > unit(MU) based interface(s) with application core, where kernel is > running. > > > > It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93. > > > > > > > > This patch adds the driver for communication interface to > > > > secure-enclave, for exchanging messages with NXP secure enclave HW > > > > IP(s) like EdgeLock Enclave (ELE) from Kernel-space, used by > > > > kernel management layers like > > > > - DM-Crypt. > > > > > > > > Signed-off-by: Pankaj Gupta > > > > --- > > > > drivers/firmware/imx/Kconfig | 12 + > > > > drivers/firmware/imx/Makefile | 2 + > > > > drivers/firmware/imx/ele_base_msg.c | 286 +++++++++++++++++++ > > > > drivers/firmware/imx/ele_base_msg.h | 92 +++++++ > > > > drivers/firmware/imx/ele_common.c | 239 ++++++++++++++++ > > > > drivers/firmware/imx/ele_common.h | 43 +++ > > > > drivers/firmware/imx/se_ctrl.c | 531 > > > ++++++++++++++++++++++++++++++++++++ > > > > drivers/firmware/imx/se_ctrl.h | 99 +++++++ > > > > include/linux/firmware/imx/se_api.h | 14 + > > > > 9 files changed, 1318 insertions(+) > > > > > > > > > > > +static int se_probe_if_cleanup(struct platform_device *pdev) { > > > > + struct device *dev =3D &pdev->dev; > > > > + struct se_if_priv *priv; > > > > + int ret =3D 0; > > > > + > > > > + priv =3D dev_get_drvdata(dev); > > > > + if (!priv) { > > > > + ret =3D 0; > > > > + dev_dbg(dev, "SE-MU Priv data is NULL;"); > > > > + return ret; > > > > + } > > > > + > > > > + if (priv->tx_chan) > > > > + mbox_free_channel(priv->tx_chan); > > > > + if (priv->rx_chan) > > > > + mbox_free_channel(priv->rx_chan); > > > > + > > > > + /* free the buffer in se remove, previously allocated > > > > + * in se probe to store encrypted IMEM > > > > + */ > > > > + if (priv->imem.buf) { > > > > + dmam_free_coherent(dev, > > > > + ELE_IMEM_SIZE, > > > > + priv->imem.buf, > > > > + priv->imem.phyaddr); > > > > + priv->imem.buf =3D NULL; > > > > + } > > > > + > > > > + if (priv->flags & RESERVED_DMA_POOL) { > > > > + of_reserved_mem_device_release(dev); > > > > > > You can call this unconditionally, no need to keep track if you > > > called > > > of_reserved_mem_device_init() successfully. > > > > But it will not be called for each SoC. > > The memory is not reserved for i.MX95 platforms. > > This is required. > > Again: You can call this unconditionally. Look at the code, > of_reserved_mem_device_release() won't do anything if you haven't called > of_reserved_mem_device_init() before. Agree. Accepted and will removed in v3. > > Sascha > > -- > Pengutronix e.K. | = | > Steuerwalder Str. 21 | > http://www.p/ > engutronix.de%2F&data=3D05%7C02%7Cpankaj.gupta%40nxp.com%7Cead7b9 > 3ccacb404124bf08dc7beca6b2%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > 0%7C0%7C638521503534570049%7CUnknown%7CTWFpbGZsb3d8eyJWIjoi > MC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0% > 7C%7C%7C&sdata=3DU0BX68CpPzJg%2B9IytihYTcmivJhfn7xbfIQpMp0R8o0%3D > &reserved=3D0 | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 = | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 = |