Received: by 2002:a89:413:0:b0:1fd:dba5:e537 with SMTP id m19csp675330lqs; Fri, 14 Jun 2024 02:09:17 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXiCJu/7x8dYh3cB0gB2RZNKJVvRMoTZlSy0f9ENhMwlaQsu/pST7PhB4BlopIFk1FIllvzVIdi0/vmZfmEWd9U30cPGDOc7hMOfprWbg== X-Google-Smtp-Source: AGHT+IHiZGGYOLG1ZYNpB5S48iJIE+UT7MLk0oVDW45CLAObLuTfu3SNq0tKRXEf5W84LIUoG23L X-Received: by 2002:a17:906:52d3:b0:a6f:22ea:55b6 with SMTP id a640c23a62f3a-a6f60de1c64mr138164266b.65.1718356157582; Fri, 14 Jun 2024 02:09:17 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1718356157; cv=pass; d=google.com; s=arc-20160816; b=f9d2/3MDh/fzrsSMOJJ1vhV/4LqVgqyu+ON5g4WBdh3LDL+h0FOGJBse+3j6DPXodE V3CT9kj1hNorHOi8b+3vKT0B6eCmA/p4htpD1TOuRhgKYWy3d3e9IQdv0dsq61SEn8U2 OarqwZi2oIwwmhiMp4++KCoubh5PaC3LMaig2KxIZVOUs5v7cmEYeZN4VJmIH2/yPJ5L 9WCkKgYy4EBhZC8JbwQzTKAEkFcETvkq/IGz87Ovjl1bFSNIwuh8L986u5LMkJ21oboi 4rJYAI6rbiBo834/oaYZ7sm1s6jbBDTN2WLpXSvkGpinVy9ep3LrOybtZ/eZsTjaCIHM SXWw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:date:message-id:dkim-signature; bh=1X/gFKINVApjWSbUv0b70B/C3Us7zSQW86S+HUnm898=; fh=udg4O2pMKUPZntayawa2l61uFAh2mtfyA+ogEOADCU4=; b=EmF0ZymokmStG+rW1j8jGrQ92eRkJ905PeL8mCDEToiUImJtBX7RN/EHkj8Rkg1qgf TORKe4DSH4+pYVFIzjE1kxilIMyuYJS4CkBUmlWlMcgAh4K8xWJtTv/56LZ9pzcCb2Wd cq2Fv3esGP2dhM9nM7sEmM7MsgDiwkCzilKeym9tuPUer9ALyUbwBAFKcVowA7Fx0nCg 4Wsx0GcxkzGzgmH9ugI3SukoGb/MrVXNZGZhPhCHiOELTx7YQI+n6dl8Mv+UkLbMn9lm 3esJZi5Pmp63fqKz3vseVDKndYfhng1/Ul2WC1rHLJnjNapKyjyucr6O43NKdKyn1gPU Xtdw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eNBypqnE; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-214612-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-214612-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id a640c23a62f3a-a6f56e26966si154100766b.702.2024.06.14.02.09.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 02:09:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-214612-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eNBypqnE; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-214612-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-214612-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 2557D1F23386 for ; Fri, 14 Jun 2024 09:09:17 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 09AE01922DB; Fri, 14 Jun 2024 09:09:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="eNBypqnE" Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E59B018FDA0; Fri, 14 Jun 2024 09:09:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718356145; cv=none; b=HPUlMu9nZBiHKw0aTVeHyOMgV8AVeclE1LHY2UZcm0EIYugMFmkqiK2ky6QwhKr360n6ysDCxjGcxFTaweZo1F/8I0UDOyMfQaboaXKyhYnswzzinUg1PDVR7/+Wz6fg3bd+zaRFIWs9JsK8S4MT+FK0afJ9byGLmr1pRfMcOqE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718356145; c=relaxed/simple; bh=300Ghz6NYmdB4lPInOyCX3ALeLqsytBDX+8juht/XBs=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=h29b/Gw5luijOsDmgkPGjl1DVomthuQzWex97XcBgECShSTDXWvjf/vxK8uYDSWldlYWE1jfJkbXCYcwmQt52FO4xgSAuQsvdlHgkHNiKaylrjk9OnQzvFkH/ZRmyp4cxwSPgucxvmTs/CjEZ3pYG652cjnjONNw8WutGmhCwEc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=eNBypqnE; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45E98Vaj072850; Fri, 14 Jun 2024 04:08:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718356111; bh=1X/gFKINVApjWSbUv0b70B/C3Us7zSQW86S+HUnm898=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=eNBypqnE6DwnxCcyepFYbbogWcL+LMo5kJKl5HEouXZtQbfj+7AZDDlwuZ6DNejgv WDHXRuUhyxIRqlyZ1XO1saZoEQuEOfY4HFlXUx0yLTy3tYBYWWohnGzJQLn+YtecWb M4rbMVKStRgMrfuSrA+rTBDWPqybymh3CaTezRNQ= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45E98VC4020605 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 14 Jun 2024 04:08:31 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 14 Jun 2024 04:08:30 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 14 Jun 2024 04:08:30 -0500 Received: from [172.24.227.57] (linux-team-01.dhcp.ti.com [172.24.227.57]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45E98P58090352; Fri, 14 Jun 2024 04:08:25 -0500 Message-ID: <60bc57a7-732b-4dcb-ae72-158639a635c0@ti.com> Date: Fri, 14 Jun 2024 14:38:24 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v2 2/3] net: ethernet: ti: Register the RPMsg driver as network device To: Andrew Lunn CC: , , , , , , , , , , , , , , , , Siddharth Vadapalli , References: <20240531064006.1223417-1-y-mallik@ti.com> <20240531064006.1223417-3-y-mallik@ti.com> <4416ada7-399b-4ea0-88b0-32ca432d777b@lunn.ch> <2d65aa06-cadd-4462-b8b9-50c9127e6a30@ti.com> <8b4dc94a-0d59-499f-8f28-d503e91f2b27@lunn.ch> Content-Language: en-US From: Yojana Mallik In-Reply-To: <8b4dc94a-0d59-499f-8f28-d503e91f2b27@lunn.ch> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 6/12/24 20:29, Andrew Lunn wrote: >> The shared memory address space in AM64x board is 2G and u32 data type for >> address works to use this address space. In order to make the driver generic,to >> work with systems that have more than 4G address space, we can change the base >> addr data type to u64 in the virtual driver code and the corresponding >> necessary changes have to be made in the firmware. > > You probably need to think about this concept in a more generic > way. You have a block of memory which is physically shared between two > CPUs. Does each have its own MMU involved in accesses this memory? Why > would each see the memory at the same physical address? Why does one > CPU actually know anything about the memory layout of another CPU, and > can tell it how to use its own memory? Do not think about your AM64x > board when answering these questions. Think about an abstract system, > two CPUs with a block of shared memory. Maybe it is even a CPU and a > GPU with shared memory, etc. > >> The shared memory layout is modeled as circular buffer. >> /* Shared Memory Layout >> * >> * --------------------------- ***************** >> * | MAGIC_NUM | icve_shm_head >> * | HEAD | >> * --------------------------- ***************** >> * | MAGIC_NUM | >> * | PKT_1_LEN | >> * | PKT_1 | >> * --------------------------- >> * | MAGIC_NUM | >> * | PKT_2_LEN | icve_shm_buf >> * | PKT_2 | >> * --------------------------- >> * | . | >> * | . | >> * --------------------------- >> * | MAGIC_NUM | >> * | PKT_N_LEN | >> * | PKT_N | >> * --------------------------- **************** >> * | MAGIC_NUM | icve_shm_tail >> * | TAIL | >> * --------------------------- **************** >> */ >> >> Linux retrieves the following info provided in response by R5 core: >> >> Tx buffer head address which is stored in port->tx_buffer->head >> >> Tx buffer buffer's base address which is stored in port->tx_buffer->buf->base_addr >> >> Tx buffer tail address which is stored in port->tx_buffer->tail >> >> The number of packets that can be put into Tx buffer which is stored in >> port->icve_tx_max_buffers >> >> Rx buffer head address which is stored in port->rx_buffer->head >> >> Rx buffer buffer's base address which is stored in port->rx_buffer->buf->base_addr >> >> Rx buffer tail address which is stored in port->rx_buffer->tail >> >> The number of packets that are put into Rx buffer which is stored in >> port->icve_rx_max_buffers > > I think most of these should not be pointers, but offsets from the > base of the shared memory. It then does not matter if they are mapped > at different physical addresses on each CPU. > >> Linux trusts these addresses sent by the R5 core to send or receive ethernet >> packets. By this way both the CPUs map to the same physical address. > > I'm not sure Linux should trust the R5. For a generic implementation, > the trust should be held to a minimum. There needs to be an agreement > about how the shared memory is partitioned, but each end needs to > verify that the memory is in fact valid, that none of the data > structures point outside of the shared memory etc. Otherwise one > system can cause memory corruption on the other, and that sort of bug > is going to be very hard to debug. > > Andrew > The Linux Remoteproc driver which initializes remote processor cores carves out a section from DDR memory as reserved memory for each remote processor on the SOC. This memory region has been reserved in the Linux device tree file as reserved-memory. Out of this reserved memory for R5 core some memory is reserved for shared memory. The shared memory is divided into two distinct regions: one for the A53 -> R5 data path (Tx buffer for Linux), and other for R5 -> A53 data path (Rx buffer for Linux). Four entities total shared memory size, number of packets, buffer slot size and base address of buffer has been hardcoded into the firmware code for both the Tx and Rx buffer. These four entities are informed by the R5 core and Linux retrieves these info from message received using icve_rpmsg_cb. Using the Base Address for Tx or Rx shared memory received and the value of number of packets, buffer slot size received, buffer's head address, shared memory buffer buffer's base address and tail address is calculated in the driver. Linux driver uses ioremap function to translate these physical addresses calculated into virtual address. Linux uses these virtual addresses to send packets to remote cores using icve_start_xmit function. It has been agreed upon by design that the remote core will use a particular start address of buffer and Linux will also use it, and it has been harcoded in the firmware in the remote core. Since this address has been harcoded in the firmware, it can be hardcoded in the Linux driver code and then a check can be made if the address received from remote core matches with the address hardcoded in the Linux driver. But viewing the driver from a generic perspective, the driver can interact with different firmware whose start address for the shared memory region will not match the one hardcoded into the Linux driver. This is why it has been decided to hardcode the start address in the firmware and it will be sent by the remote core to Linux and Linux will use it. Kindly suggest in what other ways can the driver get to know the start address of the shared memory if not informed by the remote core. Also how to do a check if the address is valid. Thanks and regards, Yojana Mallik