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R. Silva" , Erick Archer , Joel Granados , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 4/6] RISC-V: Detect unaligned vector accesses supported. Message-ID: <20240614-broadly-lucrative-d2c1e746ee32@spud> References: <20240613191616.2101821-1-jesse@rivosinc.com> <20240613191616.2101821-5-jesse@rivosinc.com> <20240614-viral-dinghy-71d5f6585a55@wendy> <20240614-distaste-negligee-ba9216a8684e@wendy> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="bHd5NbqcRQWbEnk6" Content-Disposition: inline In-Reply-To: --bHd5NbqcRQWbEnk6 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jun 14, 2024 at 10:28:17AM -0400, Jesse Taube wrote: >=20 >=20 > On 6/14/24 04:40, Conor Dooley wrote: > > On Fri, Jun 14, 2024 at 09:36:55AM +0100, Conor Dooley wrote: > > > On Thu, Jun 13, 2024 at 03:16:13PM -0400, Jesse Taube wrote: > > > > --- a/arch/riscv/kernel/unaligned_access_speed.c > > > > +++ b/arch/riscv/kernel/unaligned_access_speed.c > > > > @@ -19,7 +19,8 @@ > > > > #define MISALIGNED_BUFFER_ORDER get_order(MISALIGNED_BUFFER_SIZE) > > > > #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80) > > > > -DEFINE_PER_CPU(long, misaligned_access_speed); > > > > +DEFINE_PER_CPU(long, misaligned_access_speed) =3D RISCV_HWPROBE_MI= SALIGNED_UNKNOWN; > > > > +DEFINE_PER_CPU(long, vector_misaligned_access) =3D RISCV_HWPROBE_V= EC_MISALIGNED_UNSUPPORTED; > > > > #ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS > > > > static cpumask_t fast_misaligned_access; > > > > @@ -268,12 +269,18 @@ static int check_unaligned_access_all_cpus(vo= id) > > > > if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICCLSM)) { > > > > for_each_online_cpu(cpu) { > > > > +#ifdef CONFIG_RISCV_VECTOR_MISALIGNED > > > > + per_cpu(vector_misaligned_access, cpu) =3D RISCV_HWPROBE_VEC_MI= SALIGNED_FAST; > > > > +#endif > > > > +#ifdef CONFIG_RISCV_MISALIGNED > > > > per_cpu(misaligned_access_speed, cpu) =3D RISCV_HWPROBE_MISALI= GNED_FAST; > > > > +#endif > > >=20 > > > Can you IS_ENABLED()-ify these two as well please? > >=20 > > Ah, you can't cos the variable doesn't exist in the other case. >=20 > Yeah kinda just dealing with how it was originally written ideally we wou= ld > use IS_ENABLED. I don't really want to have a 500+ diff patch > IS_ENABLED()-ifying the original code as well. I can do that if necessary > though. No, dw about it. I made a mistake. --bHd5NbqcRQWbEnk6 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZmxUagAKCRB4tDGHoIJi 0o1sAP0TjaWh4s+Jwxjvs/uZ5QEX2QJNGQYVE//gvXVXIHZMNQEA3q14c179bYze sMPmEmacDngXPwLaxzE2H5mG8E6jtwc= =POGL -----END PGP SIGNATURE----- --bHd5NbqcRQWbEnk6--