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Sun, 16 Jun 2024 09:25:38 -0400 (EDT) From: Jiaxun Yang Date: Sun, 16 Jun 2024 14:25:02 +0100 Subject: [PATCH fixes 1/4] MIPS: mipsmtregs: Fix target register for MFTC0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240616-mips-mt-fixes-v1-1-83913e0e60fc@flygoat.com> References: <20240616-mips-mt-fixes-v1-0-83913e0e60fc@flygoat.com> In-Reply-To: <20240616-mips-mt-fixes-v1-0-83913e0e60fc@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=864; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=Et779FeuNWZclxrmdOYQKmc3OZKxVm93sf+cH8Swk6s=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrS85xd1z8gU/Kyb6pyXt73b54DpjCaGqHh1zf8mL1y6L rkbLrXoKGVhEONikBVTZAkRUOrb0HhxwfUHWX9g5rAygQxh4OIUgIn0MzH8z/0pV3xqmQ7fPclG yfuzuuUl/1x4G2lazXq/QmK3do92JyPDAx2v6P6HLxh/fGb8M+eSgxDDg7Wx/cL8jO2d38OPm8s zAgA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Target register of mftc0 should be __res instead of $1, this is a leftover from old .insn code. Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang --- arch/mips/include/asm/mipsmtregs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h index 30e86861c206..b1ee3c48e84b 100644 --- a/arch/mips/include/asm/mipsmtregs.h +++ b/arch/mips/include/asm/mipsmtregs.h @@ -322,7 +322,7 @@ static inline void ehb(void) " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ _ASM_SET_MFTC0 \ - " mftc0 $1, " #rt ", " #sel " \n" \ + " mftc0 %0, " #rt ", " #sel " \n" \ _ASM_UNSET_MFTC0 \ " .set pop \n" \ : "=r" (__res)); \ -- 2.43.0