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Message-ID: <4779de450802141928led16cebkfb989551eb88a8cb@mail.gmail.com>
Date: Thu, 14 Feb 2008 19:28:55 -0800
From: "Dan Gora" <dan.gora@gmail.com>
To: linux-kernel@vger.kernel.org
Subject: PCI Bursting with PIO
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Hi,

I am trying to optimize a driver for a slave only PCI device and am
having a lot of trouble getting any kind of PCI burst transactions in
either the read or the write direction.  Using bcopy/memcpy or even a
hand-crafted while (len) { *pdst++ = *psrc++} (with pdst and psrc
unsigned long*) I can only get writes to burst and even in that case
only for 2 data phases (8 bytes) and only on 64 bit machines.  The
best that I have managed is to use a hand crafted asm function which
copies the data through mmx registers on i386 machines, but that still
only bursts a maximum of 16 bytes in the write direction and not at
all in the read direction.  The source and destination pointers are
both aligned to 8 byte boundaries, so I don't think that it's an
alignment issue.

Is there any way to get PIO to burst over the PCI bus in the read and
write direction?  My device has 4 BAR registers, but the area where I
am transferring data is marked 'prefetchable' (although the others are
not).  I read here: http://lkml.org/lkml/2004/9/23/393 that this was a
prerequisite, but it is apparently not sufficient.  He also mentioned
that the area had to be marked as write-back, but it's not clear how
you can tell (no /proc/mtrr doesn't tell you) or that it has anything
to do with bursting reads.

Any ideas would be really appreciated,

thanks-
dan
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