Date: Wed, 20 Feb 2008 10:34:46 +0100
From: Haavard Skinnemoen <hskinnemoen@atmel.com>
To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: david-b@pacbell.net, spi-devel-general@lists.sourceforge.net,
       linux-kernel@vger.kernel.org
Subject: Re: atmel_spi clock polarity
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On Wed, 20 Feb 2008 14:21:09 +0900 (JST)
Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:

> On Mon, 18 Feb 2008 15:31:58 +0100, Haavard Skinnemoen <hskinnemoen@atmel.com> wrote:
> > > Anyway, I will try your patch in a few days.
> > 
> > Ok, thanks. If it works, that would be great, but given your
> > description above I'm not sure if I dare hope for it.
> 
> Unfortunately it did not work.  The clock state did not change by
> writing MR register.

Ok, thanks for testing.

In that case, I think the best fix is to let NPCS0 stay selected
permanently in MR and overwrite CSR0 with to the new slave's settings
before asserting CS. But that's a more complicated change, and I don't
know how it will affect the AT91RM9200 special cases.

So I suggest we merge your patch for 2.6.25, and try to optimize it
for 2.6.26.

David, do you want me to pass on the patch with my signoff or just ask
Andrew to add my Acked-by to the patch already in mm?

Haavard
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