Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760982AbYCCRc2 (ORCPT ); Mon, 3 Mar 2008 12:32:28 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1759596AbYCCRQT (ORCPT ); Mon, 3 Mar 2008 12:16:19 -0500 Received: from mx1.redhat.com ([66.187.233.31]:36473 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759702AbYCCRQO (ORCPT ); Mon, 3 Mar 2008 12:16:14 -0500 From: Glauber Costa To: linux-kernel@vger.kernel.org Cc: akpm@linux-foundation.org, glommer@gmail.com, mingo@elte.hu, tglx@linutronix.de, Glauber Costa Subject: [PATCH 49/52] wrap esr setting up in i386 in lapic_setup_esr Date: Mon, 3 Mar 2008 14:13:17 -0300 Message-Id: <1204564400-17636-50-git-send-email-gcosta@redhat.com> X-Mailer: git-send-email 1.5.3.6 In-Reply-To: <1204564400-17636-49-git-send-email-gcosta@redhat.com> References: <1204564400-17636-1-git-send-email-gcosta@redhat.com> <1204564400-17636-2-git-send-email-gcosta@redhat.com> <1204564400-17636-3-git-send-email-gcosta@redhat.com> <1204564400-17636-4-git-send-email-gcosta@redhat.com> <1204564400-17636-5-git-send-email-gcosta@redhat.com> <1204564400-17636-6-git-send-email-gcosta@redhat.com> <1204564400-17636-7-git-send-email-gcosta@redhat.com> <1204564400-17636-8-git-send-email-gcosta@redhat.com> <1204564400-17636-9-git-send-email-gcosta@redhat.com> <1204564400-17636-10-git-send-email-gcosta@redhat.com> <1204564400-17636-11-git-send-email-gcosta@redhat.com> <1204564400-17636-12-git-send-email-gcosta@redhat.com> <1204564400-17636-13-git-send-email-gcosta@redhat.com> <1204564400-17636-14-git-send-email-gcosta@redhat.com> <1204564400-17636-15-git-send-email-gcosta@redhat.com> <1204564400-17636-16-git-send-email-gcosta@redhat.com> <1204564400-17636-17-git-send-email-gcosta@redhat.com> <1204564400-17636-18-git-send-email-gcosta@redhat.com> <1204564400-17636-19-git-send-email-gcosta@redhat.com> <1204564400-17636-20-git-send-email-gcosta@redhat.com> <1204564400-17636-21-git-send-email-gcosta@redhat.com> <1204564400-17636-22-git-send-email-gcosta@redhat.com> <1204564400-17636-23-git-send-email-gcosta@redhat.com> <1204564400-17636-24-git-send-email-gcosta@redhat.com> <1204564400-17636-25-git-send-email-gcosta@redhat.com> <1204564400-17636-26-git-send-email-gcosta@redhat.com> <1204564400-17636-27-git-send-email-gcosta@redhat.com> <1204564400-17636-28-git-send-email-gcosta@redhat.com> <1204564400-17636-29-git-send-email-gcosta@redhat.com> <1204564400-17636-30-git-send-email-gcosta@redhat.com> <1204564400-17636-31-git-send-email-gcosta@redhat.com> <1204564400-17636-32-git-send-email-gcosta@redhat.com> <1204564400-17636-33-git-send-email-gcosta@redhat.com> <1204564400-17636-34-git-send-email-gcosta@redhat.com> <1204564400-17636-35-git-send-email-gcosta@redhat.com> <1204564400-17636-36-git-send-email-gcosta@redhat.com> <1204564400-17636-37-git-send-email-gcosta@redhat.com> <1204564400-17636-38-git-send-email-gcosta@redhat.com> <1204564400-17636-39-git-send-email-gcosta@redhat.com> <1204564400-17636-40-git-send-email-gcosta@redhat.com> <1204564400-17636-41-git-send-email-gcosta@redhat.com> <1204564400-17636-42-git-send-email-gcosta@redhat.com> <1204564400-17636-43-git-send-email-gcosta@redhat.com> <1204564400-17636-44-git-send-email-gcosta@redhat.com> <1204564400-17636-45-git-send-email-gcosta@redhat.com> <1204564400-17636-46-git-send-email-gcosta@redhat.com> <1204564400-17636-47-git-send-email-gcosta@redhat.com> <1204564400-17636-48-git-send-email-gcosta@redhat.com> <1204564400-17636-49-git-send-email-gcosta@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3364 Lines: 112 it is a little bit more complicated than x86_64 due to erratas and other stuff, but its existance will ease integration Signed-off-by: Glauber Costa --- arch/x86/kernel/apic_32.c | 73 ++++++++++++++++++++++++-------------------- 1 files changed, 40 insertions(+), 33 deletions(-) diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index 6aa93db..4a754ee 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c @@ -897,12 +897,50 @@ void __init init_bsp_APIC(void) apic_write_around(APIC_LVT1, value); } +void __cpuinit lapic_setup_esr(void) +{ + unsigned long oldvalue, value, maxlvt; + if (lapic_is_integrated() && !esr_disable) { + /* !82489DX */ + maxlvt = lapic_get_maxlvt(); + if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ + apic_write(APIC_ESR, 0); + oldvalue = apic_read(APIC_ESR); + + /* enables sending errors */ + value = ERROR_APIC_VECTOR; + apic_write_around(APIC_LVTERR, value); + /* + * spec says clear errors after enabling vector. + */ + if (maxlvt > 3) + apic_write(APIC_ESR, 0); + value = apic_read(APIC_ESR); + if (value != oldvalue) + apic_printk(APIC_VERBOSE, "ESR value before enabling " + "vector: 0x%08lx after: 0x%08lx\n", + oldvalue, value); + } else { + if (esr_disable) + /* + * Something untraceable is creating bad interrupts on + * secondary quads ... for the moment, just leave the + * ESR disabled - we can't do anything useful with the + * errors anyway - mbligh + */ + printk(KERN_INFO "Leaving ESR disabled.\n"); + else + printk(KERN_INFO "No ESR for 82489DX.\n"); + } +} + + /** * setup_local_APIC - setup the local APIC */ void __cpuinit setup_local_APIC(void) { - unsigned long oldvalue, value, maxlvt, integrated; + unsigned long value, integrated; int i, j; /* Pound the ESR really hard over the head with a big hammer - mbligh */ @@ -1027,38 +1065,7 @@ void __cpuinit setup_local_APIC(void) value |= APIC_LVT_LEVEL_TRIGGER; apic_write_around(APIC_LVT1, value); - if (integrated && !esr_disable) { - /* !82489DX */ - maxlvt = lapic_get_maxlvt(); - if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ - apic_write(APIC_ESR, 0); - oldvalue = apic_read(APIC_ESR); - - /* enables sending errors */ - value = ERROR_APIC_VECTOR; - apic_write_around(APIC_LVTERR, value); - /* - * spec says clear errors after enabling vector. - */ - if (maxlvt > 3) - apic_write(APIC_ESR, 0); - value = apic_read(APIC_ESR); - if (value != oldvalue) - apic_printk(APIC_VERBOSE, "ESR value before enabling " - "vector: 0x%08lx after: 0x%08lx\n", - oldvalue, value); - } else { - if (esr_disable) - /* - * Something untraceable is creating bad interrupts on - * secondary quads ... for the moment, just leave the - * ESR disabled - we can't do anything useful with the - * errors anyway - mbligh - */ - printk(KERN_INFO "Leaving ESR disabled.\n"); - else - printk(KERN_INFO "No ESR for 82489DX.\n"); - } + lapic_setup_esr(); /* Disable the local apic timer */ value = apic_read(APIC_LVTT); -- 1.5.0.6 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/