Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755283AbYCZWRT (ORCPT ); Wed, 26 Mar 2008 18:17:19 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752798AbYCZWRL (ORCPT ); Wed, 26 Mar 2008 18:17:11 -0400 Received: from mx2.mail.elte.hu ([157.181.151.9]:46995 "EHLO mx2.mail.elte.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752775AbYCZWRK (ORCPT ); Wed, 26 Mar 2008 18:17:10 -0400 Date: Wed, 26 Mar 2008 23:10:27 +0100 From: Ingo Molnar To: Benjamin Herrenschmidt Cc: Linus Torvalds , Ivan Kokshaysky , Gary Hade , Thomas Meyer , Stefan Richter , Thomas Gleixner , "Rafael J. Wysocki" , LKML , Adrian Bunk , Andrew Morton , Natalie Protasevich , pm@debian.org Subject: Re: [patch] pci: revert "PCI: remove transparent bridge sizing" Message-ID: <20080326221027.GA7959@elte.hu> References: <20080326101450.GA9060@jurassic.park.msu.ru> <20080326135458.GA27621@elte.hu> <20080326180701.GA6249@us.ibm.com> <20080326203012.GB6249@us.ibm.com> <20080326205828.GA15225@jurassic.park.msu.ru> <1206568675.6926.7.camel@pasglop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1206568675.6926.7.camel@pasglop> User-Agent: Mutt/1.5.17 (2007-11-01) X-ELTE-VirusStatus: clean X-ELTE-SpamScore: -1.5 X-ELTE-SpamLevel: X-ELTE-SpamCheck: no X-ELTE-SpamVersion: ELTE 2.0 X-ELTE-SpamCheck-Details: score=-1.5 required=5.9 tests=BAYES_00 autolearn=no SpamAssassin version=3.2.3 -1.5 BAYES_00 BODY: Bayesian spam probability is 0 to 1% [score: 0.0000] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1316 Lines: 27 * Benjamin Herrenschmidt wrote: > > NOTE! This will also consider a bridge resource at 0 to be an > > invalid resource (since now the alignment will be zero), which is a > > bit odd and makes me worry a bit. I wouldn't be surprised if some > > non-PC architectures have PCI bridges at zero. But maybe they should > > be (or already are?) marked IORESOURCE_PCI_FIXED? > > PCI bridges at zero is perfectly valid indeed and I'm sure we have > that around at least for IO space. In fact, I'm surprised you don't > have that on x86. Typically, things like an HT segment with a P2P > bridge and behind that bridge an ISA bridge could well have the P2P > bridge with a resource forwarding 0...0x1000 IO downstream for example > even on x86 no ? (I'm not -that- familiar with the crazyness of legacy > ISA on x86 but I've definitely seen such setup on other archs). 0..0x1000 physical memory (== bus memory on x86) is reserved to the BIOS as RAM in essence and that legacy will be with us for at least 100 or maybe 200 years ;-) Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/