Date: Thu, 5 Jun 2008 21:45:36 -0700
From: Arjan van de Ven <arjan@infradead.org>
To: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Ingo Molnar <mingo@elte.hu>, x86@kernel.org,
       Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
       Jan Beulich <jbeulich@novell.com>, Stable Kernel <stable@kernel.org>
Subject: Re: [PATCH] x86: set PAE PHYSICAL_MASK_SHIFT to match 64-bit
Message-ID: <20080605214536.0e289ebb@infradead.org>
In-Reply-To: <4848046A.5060006@goop.org>
References: <4848046A.5060006@goop.org>
Organization: Intel
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On Thu, 05 Jun 2008 16:21:14 +0100
Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can
> potentially have the same number of physical address bits as the
> 64-bit host ("Enhanced Legacy PAE Paging").
> 

the problem on 32 bit is that if you have that much ram, you run out of
lowmem FAST.... so you have bigger problems.

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