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Date: Fri, 18 Jan 2002 22:07:09 +0100 (CET)
From: =?ISO-8859-1?Q?G=E9rard_Roudier?= <groudier@free.fr>
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To: "David S. Miller" <davem@redhat.com>
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        <alan@lxorguk.ukuu.org.uk>, <rmk@arm.linux.org.uk>,
        <dan@embeddededge.com>, <mattl@mvista.com>
Subject: Re: pci_alloc_consistent from interrupt == BAD
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Message-ID: <20020118215449.K2042-100000@gerard>
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On Fri, 18 Jan 2002, David S. Miller wrote:

>    From: G?rard Roudier <groudier@free.fr>
>    Date: Fri, 18 Jan 2002 21:21:35 +0100 (CET)
>
>    I have noted that some ports may [ever] require pci_alloc_consistent not
>    to be called from interrupt context. Just I will look into this when time
>    will allow.
>
> Do not bother Gerard, these ports really are broken and
> pci_alloc_consistent must work from interrupts.
>
>    I am not going to ever use not cache coherent hardware, even if I am ready
>    to make the sym driver work reliably on such brain-dead things. Just it is
>    not high priority stuff for now.
>
> Perhaps you misunderstand, it is not "lack of cache coherency" it is
> "cache needs flushing around DMA transfers" and this is handled
> perfectly by PCI DMA interfaces.  It is nothing you should be
> concerned about.

Depends on the OS.

Under Linux, PCI consistent allocation support is a requirement. Let me
cross fingers for this to stay as it is. :)

Under some other (NetBSD, for example, just not to name it :)), such
feature is just a hint and as a result drivers are theorically also
required to care about cache flushing for DMAs that involve driver
internal data structures if full portability is in concern. Btw, I donnot
really use NetBSD O/S but just ported sym-2 to it (NetBSD-1.5 with
coherency being a requirement for driver data structure allocations) as an
exercise.

  G?rard.

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