Date: Mon, 30 Jun 2008 22:31:19 +0000
From: Sean Young <sean@mess.org>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>,
       Rusty Russell <rusty@rustcorp.com.au>, linux-kernel@vger.kernel.org
Subject: Re: Regression: boot failure on AMD Elan TS-5500
Message-ID: <20080630223119.GB58260@atlantis.8hz.com>
References: <20080616121138.GA51097@atlantis.8hz.com> <200806162327.34912.rusty@rustcorp.com.au> <48566C88.6000702@goop.org> <20080616161944.GA53539@atlantis.8hz.com> <20080630214347.GA57988@atlantis.8hz.com> <4869558A.9020907@goop.org> <48695871.8000805@zytor.com>
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On Mon, Jun 30, 2008 at 03:04:33PM -0700, H. Peter Anvin wrote:
> Jeremy Fitzhardinge wrote:
> >It's a bit odd that the boot loader neglected to set up ds properly, but 
> >changing the testb line to
> >
> >    testb $(1<<6), %cs:BP_loadflags(%esi)
> >
> >should work.  (Or perhaps a %ss: override would be better?)
> >
> >I'm assuming that the GDT setup isn't completely mad and that the 
> >segments have the same base at least.
> >
> 
> This should have been set up by the *boot code* (specifically lines 
> 57-61 of arch/x86/boot/pmjump.S) since he's using a conventional boot 
> loader (syslinux) so something is utterly fuggled up.  Using %cs: here 
> should be safe, though (and *is* more conservative, after all, why 
> otherwise bother reloading these segments at all?), but it still 
> concerns me a great deal if this is broken in this way.  It's definitely 
> better than %ss:.
> 
> In particular, I'm wondering if the Elan CPU has any strange ordering 
> requirements with regards to the protected mode transition that we're 
> not obeying.
> 
> It would be interesting to put in a heavyweight "brutally synchronizing" 
> instruction like WBINVD at various places in arch/x86/boot/pmjump.S and 
> see if it helps.

You are right. With wbinvd before %ds is changed in that file the kernel
boots. 


Sean
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