Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753043AbYGVTZE (ORCPT ); Tue, 22 Jul 2008 15:25:04 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752972AbYGVTXy (ORCPT ); Tue, 22 Jul 2008 15:23:54 -0400 Received: from outbound-va3.frontbridge.com ([216.32.180.16]:25014 "EHLO VA3EHSOBE002.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752400AbYGVTXv (ORCPT ); Tue, 22 Jul 2008 15:23:51 -0400 X-BigFish: VPS22(zzzz10d3izzz32i87il66h) X-Spam-TCS-SCL: 5:0 X-FB-DOMAIN-IP-MATCH: fail X-WSS-ID: 0K4F9V8-01-8PB-01 From: Robert Richter To: Barry Kasindorf , Ingo Molnar CC: Thomas Gleixner , oprofile-list , LKML , Robert Richter Subject: [PATCH 02/24] x86: apic_*.c: Add description to AMD's extended LVT functions Date: Tue, 22 Jul 2008 21:08:46 +0200 Message-ID: <1216753748-11261-3-git-send-email-robert.richter@amd.com> X-Mailer: git-send-email 1.5.5.4 In-Reply-To: <1216753748-11261-1-git-send-email-robert.richter@amd.com> References: <1216753748-11261-1-git-send-email-robert.richter@amd.com> X-OriginalArrivalTime: 22 Jul 2008 19:23:38.0933 (UTC) FILETIME=[71A5B650:01C8EC30] MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1535 Lines: 43 Signed-off-by: Robert Richter --- arch/x86/kernel/apic_32.c | 3 +++ arch/x86/kernel/apic_64.c | 3 +++ 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index d6c8983..fad94b0 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c @@ -646,6 +646,9 @@ int setup_profiling_timer(unsigned int multiplier) * * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and * MCE interrupts are supported. Thus MCE offset must be set to 0. + * + * If mask=1, the LVT entry does not generate interrupts while mask=0 + * enables the vector. See also the BKDGs. */ #define APIC_EILVT_LVTOFF_MCE 0 diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index 7f1f030..42bf69f 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c @@ -205,6 +205,9 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) * * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and * MCE interrupts are supported. Thus MCE offset must be set to 0. + * + * If mask=1, the LVT entry does not generate interrupts while mask=0 + * enables the vector. See also the BKDGs. */ #define APIC_EILVT_LVTOFF_MCE 0 -- 1.5.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/