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From: <benh@kernel.crashing.org>
To: "David S. Miller" <davem@redhat.com>
Cc: <drobbins@gentoo.org>, <linux-kernel@vger.kernel.org>, <andrea@suse.de>,
        <alan@redhat.com>, <akpm@zip.com.au>, <vherva@niksula.hut.fi>,
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Subject: Re: Athlon/AGP issue update
Date: Wed, 23 Jan 2002 16:47:37 +0100
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>I don't think your PPC case needs the kernel mappings messed with.
>I really doubt the PPC will speculatively fetch/store to a TLB
>missing address.... unless you guys have large TLB mappings on
>PPC too?

Yes, we use BATs (sort of built-in fixed large TLBs) to map
the lowmem (or entire RAM without CONFIG_HIGHMEM).

So if some kind of loop is fetching memory near the end of a non-AGP
page via the linear RAM mapping (BAT mapping) and the next page is an
AGP bound page, the CPU may do speculative access to the AGP page via
the BAT mapping thus bringing in a cache line for the AGP page.

At least, that's my understanding, it has to be validated by some
CPU gurus from IBM though.

Ben.



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